公开(公告)号：US20240151844A1

公开(公告)日：2024-05-09

申请号：US18418298

申请日：2024-01-21

Applicant: STMicroelectronics S.r.l.

Inventor： Alessandro PARISI ,  Andrea CAVARRA ,  Alessandro FINOCCHIARO ,  Giuseppe PAPOTTO ,  Giuseppe PALMISANO

IPC: G01S13/58 ,  G01S7/40 ,  G01S13/931 ,  H03B5/12 ,  H03L7/099 ,  H03L7/10 ,  H03L7/193

CPC classification number: G01S13/584 ,  G01S7/4056 ,  G01S13/931 ,  H03B5/1212 ,  H03B5/1228 ,  H03B5/1243 ,  H03B5/1265 ,  H03B5/1293 ,  H03L7/099 ,  H03L7/101 ,  H03L7/103 ,  H03L7/193

Abstract: A flash analog-to-digital converter (ADC) receives an input control signal and performs coarse tuning of a frequency of an output signal, produced between first and second nodes having an inductance coupled therebetween. The flash ADC quantizes an operating frequency range for the output signal produced between the first and second nodes as M·Δf, where M is an integer from 0 to N−1, where N is a number of intervals into which a frequency range for the output signal is divided, and where Δf is a resulting frequency step produced by the quantizing. The value of M is generated based upon the input control signal and a word controlling switches of a plurality of switched capacitance circuits associated with the first and second nodes to close ones of those switches associated with the control word to coarsely tune the frequency of the output signal.

公开(公告)号：US20230194694A1

公开(公告)日：2023-06-22

申请号：US18108993

申请日：2023-02-13

Applicant: STMicroelectronics S.r.l.

Inventor： Alessandro PARISI ,  Andrea CAVARRA ,  Alessandro FINOCCHIARO ,  Giuseppe PAPOTTO ,  Giuseppe PALMISANO

IPC: G01S13/58 ,  G01S7/40 ,  G01S13/931 ,  H03B5/12 ,  H03L7/193 ,  H03L7/099 ,  H03L7/10

CPC classification number: G01S13/584 ,  G01S7/4056 ,  G01S13/931 ,  H03B5/1212 ,  H03B5/1228 ,  H03L7/193 ,  H03B5/1265 ,  H03B5/1293 ,  H03L7/099 ,  H03L7/101 ,  H03L7/103 ,  H03B5/1243

Abstract: Disclosed herein is a tunable resonant circuit including an inductance directly electrically connected in series between first and second nodes, a variable capacitance directly electrically connected between the first and second nodes, and a set of switched capacitances coupled between the first and second nodes. The set of switched capacitances includes a plurality of capacitance units, each capacitance unit comprising a first capacitance for that capacitance unit directly electrically connected between the first node and a switch and a second capacitance for the capacitance unit directly electrically connected between the switch and the second node. Control circuitry is configured to receive an input control signal and connected to control the switches of the set of switched capacitances. A biasing circuit is directly electrically connected to the tunable resonance circuit at the first and second nodes.

公开(公告)号：US20240210550A1

公开(公告)日：2024-06-27

申请号：US18594456

申请日：2024-03-04

Applicant: STMicroelectronics S.r.l.

Inventor： Alessandro FINOCCHIARO ,  Alessandro PARISI ,  Andrea CAVARRA ,  Giuseppe PAPOTTO ,  Giuseppe PALMISANO

IPC: G01S13/34 ,  G01S13/931 ,  H03B5/12 ,  H03L7/193

CPC classification number: G01S13/34 ,  G01S13/931 ,  H03B5/1231 ,  H03L7/193

Abstract: A circuit includes a phase-frequency-detector generating first and second digital control signals indicative of phase differences between an input reference-signal and an output-signal, a charge-pump generating a control-signal based upon the first and second digital control signals, and an oscillator-circuit. The oscillator-circuit includes an active core coupled between first and second nodes, with a tunable resonant circuit a set of capacitances selectively connected between the first and second nodes, wherein a tap between the first and second variable capacitances receives the control-signal for tuning the tunable resonant circuit. A timer-circuit generates a timing-signal based upon the input reference-signal and a reset-signal. A calibration-circuit controls which capacitances of the set of capacitances are connected between the first and second nodes, in response to the timing-signal and a comparison between a threshold and a voltage-signal that is based upon auxiliary pulsed currents generated based upon the first and second digital control signals.