公开(公告)号：EP0869370A1

公开(公告)日：1998-10-07

申请号：EP97830159.6

申请日：1997-04-01

Applicant: STMicroelectronics S.r.l.

Inventor： Bertotti, Franco ,  Murari, Bruno ,  Novarini, Enrico

IPC: G01R31/00 ,  G01R31/316 ,  H01L27/02 ,  H01L21/66

CPC classification number: G01R31/2621

Abstract: The method of testing a DMOS power transistor (2) comprises the phases of: arranging a switch (4) between the low-voltage circuitry (3) and the gate terminal (G) of the DMOS power transistor (2); maintaining the switch (4) in an open condition; applying a stress voltage to the gate terminal (G); testing the functionality of the DMOS power transistor (2); and, if the test has a positive outcome, short-circuiting the switch (3) through zapping.

Abstract translation: 测试DMOS功率晶体管（2）的方法包括以下阶段：在低压电路（3）和DMOS功率晶体管（2）的栅极端子（G）之间布置开关（4）。 将开关（4）保持在开启状态; 向栅极端子（G）施加应力电压; 测试DMOS功率晶体管（2）的功能; 并且，如果测试有正面的结果，则通过切换使开关（3）短路。

公开(公告)号：EP0869370B1

公开(公告)日：2003-07-02

申请号：EP97830159.6

申请日：1997-04-01

Applicant: STMicroelectronics S.r.l.

Inventor： Bertotti, Franco ,  Murari, Bruno ,  Novarini, Enrico

IPC: G01R31/00 ,  G01R31/316 ,  H01L27/02 ,  H01L21/66

CPC classification number: G01R31/2621