公开(公告)号：EP3934097A1

公开(公告)日：2022-01-05

申请号：EP21179806.1

申请日：2021-06-16

Applicant: STMicroelectronics S.r.l.

Inventor： FONTANA, Marco Giovanni ,  RIVA, Marco ,  PULVIRENTI, Francesco ,  CANTONE, Giuseppe

IPC: H03K17/082 ,  H03K17/0812 ,  H03K17/06 ,  H02M1/00 ,  H02M1/08

Abstract: A circuit (HBD) comprises a first (100a) and a second (100b) input supply nodes configured to receive a supply voltage ( V CC ) therebetween. The circuit comprises a high-side driver circuit (12a) configured to be coupled to a high-side switch (HS) of a half-bridge circuit, the high-side driver circuit (12a) configured to produce a first output control signal between a first high-side output node (120a) and a second high-side output node (102a). The circuit comprises a low-side driver circuit (12b) configured to be coupled to a low-side switch (LS) of the half-bridge circuit, the low-side driver circuit (12b) configured to produce a second output control signal between a first low-side output node (120b) and a second low-side output node (102b). The circuit comprises a floating supply node (104) configured to receive a floating supply voltage ( V CB ) applied between the floating supply node (104) and the second high-side output node (102a) to power the high-side driver circuit (12a). The circuit comprises a bootstrap diode (D3) between the first input supply node (100a) and an intermediate supply node (106), and a current limiter circuit (Q1', Dl', 62) between the intermediate supply node (106) and the floating supply node (104). The current limiter circuit (Q1', Dl', 62) is configured to sense the floating supply voltage ( V CB ) and to counter a current flow from the intermediate supply node (106) to the floating supply node (104) as a result of the floating supply voltage ( V CB ) reaching a threshold value.

公开(公告)号：EP3907888A1

公开(公告)日：2021-11-10

申请号：EP21169736.2

申请日：2021-04-21

Applicant: STMicroelectronics S.r.l.

Inventor： BOGNANNI, Fabrizio ,  CAGGEGI, Giovanni ,  CANTONE, Giuseppe ,  MARANO, Vincenzo ,  PULVIRENTI, Francesco

IPC: H03K19/0185 ,  H03K17/06 ,  H02M7/5387

Abstract: A circuit (21, 22) to transfer a command signal (CS) in a circuit (20) comprising circuit stages which are voltage supplied by different voltage domains (VCC, GND; FS, FG) including
a first voltage domain (VCC, GND) comprising first voltage levels represented by a first voltage supply (VCC) and a first voltage reference (GND), in particular a DC voltage supply and a DC ground, and
a second voltage domain (FS, FG) comprising second voltage levels represented by a second voltage supply (VFS) and a second voltage reference (V FG ), in particular a floating supply and a floating ground, and
said circuit (21, 22) to transfer a signal (CS) operating according to the first voltage domain (VCC, GND) to a stage (HS_DRV, PW1) operating according to the second voltage domain (FS, FG),
said circuit (21, 22) to transfer a command signal (CS) including a logic component (224) operating according to the second voltage domain (FS, FG) logically driving said stage (HS_DRV, PW1), and a level shifting circuit (22; 32; 42) coupled to the second voltage supply (FS) and to the first ground reference (GND),
said level shifting circuit (22; 32; 42) including two paths coupled between said second voltage supply (FS) and to the first ground reference (GND), each including a high voltage transistor (221a, 221b) coupled through a respective resistor (223a, 223b) to the second voltage supply (FS) and through a respective commanded current generator (222a; 222b) to the first ground reference (GND), each path being coupled to a respective input (S,R) of the logic component (224), said commanded current generator (222a; 222b) being commanded by pulse signals (Tp1, Tp2) generated by a pulse generator (225) on the basis of said command signal (CS),
characterized in that
said level shifting circuit (32; 42) includes a negative bootstrap circuit (C1, INV1, INV2, C2, INV3, INV4; Cpump, SINV, FINV, 228, 229) including at least a pump capacitor (C1, C2; Cpump) arranged between the current generators (222a; 222b) and the first ground reference (GND) and configured to shift at a negative voltage said first ground reference (GND) synchronically with the activation of the respective commanded current generator (222a; 222b).