公开(公告)号：EP3139275A1

公开(公告)日：2017-03-08

申请号：EP16162366.5

申请日：2016-03-24

Applicant: STMicroelectronics Design and Application s.r.o. ,  STMicroelectronics S.r.l.

Inventor： MANGANO, Daniele ,  CARRANO, Michele Alessandro ,  DISTEFANO, Gaetano ,  FRIED, Antonin

IPC: G06F11/10

CPC classification number: G06F11/1068 ,  G06F11/1044 ,  G11C29/52

Abstract: In an embodiment, a method of managing memories (10) includes:
- providing a first (11) memory module and a second memory module (12) each including a first (R1, R2) and a second (R4, R3) partition,
- writing first data (DATA1) in the first partition (R1) of the first memory module (11) and second data (DATA2) in the first partition (R2) of the second memory module (12), and
- selectively operating the first (11) and second (12) memory modules in a first operating mode or a second operating mode, where:
- in the first operating mode, parity bits (PAR1) for the first data (DATA1) are written in the second partition (R3) of the second memory module (12) and parity bits (PAR2) for the second data (DATA2) are written in the second partition (R4) of the first memory module (11),
- in the second operating mode, further data (ED1, ED2) are written in the place of parity bits (PAR1, PAR2) in the second partition (R4, R3) of one or both the first memory module (11) and the second memory module (12).

Abstract translation: 在实施例中，管理存储器（10）的方法包括： - 提供第一（11）存储器模块和第二存储器模块（12）每个都包括第一（R1，R2）和第二（R4，R3）的分区， - 在所述第一分区中的第一存储器模块的（R 1）（11）和在所述第一分区中的第二存储器模块的（R 2）（12）的第二数据（DATA2）写入第一数据（DATA1），以及 - 选择性地操作所述第一 （11）和第二在第一操作模式或第二操作模式，其中，（12）的存储器模块： - 在第一操作模式中，对于第一数据的奇偶校验位（PAR1）（DATA1）被写入到第二分区（R3 ）所述第二存储器模块（12）和用于所述第二数据的奇偶校验位（PAR2）（DATA2）的被写入到第二分区中的第一存储器模块的（R4）（11） - （在第二操作模式中，进一步的数据 ED1，ED2）被写入在一个或两个所述第一存储器模块（11的在第二分区中的奇偶校验位（PAR1，PAR2）（R4，R3））和所述第二存储器模块的地方 （12）。

公开(公告)号：EP3098720B1

公开(公告)日：2018-07-04

申请号：EP15202773.6

申请日：2015-12-28

Applicant: STMicroelectronics S.r.l.

Inventor： MANGANO, Daniele ,  CONDORELLI, Riccardo ,  DISTEFANO, Gaetano

IPC: G06F13/40 ,  G06F13/42

CPC classification number: G06F13/4282 ,  G06F13/4027 ,  G06F13/4291

Abstract: A serial protocol interface in a communication device (MD) exchanging data (MOSI, MISO) over a communication link (121, 122, 123) is operated by: - sending output data (MOSI) on (122) the communication link, and - receiving input data (MISO) on (121) the communication link, these input data (MISO) being synchronous with a clock signal (SCK, SCLK) generated at the communication device (MD) and propagated (123) over the communication link (121, 122, 123), - initializing operation by exchanging data over the communication link (121, 122, 123) by sending output data (MOSI) on the communication link (122) at a first data rate, - detecting a signal transition in the input data (MISO) received on the communication link (121), and - once such a transition is detected, exchanging data over the communication link (121, 122, 123) at a second data rate, higher than the first data, with the exchanging of data at a second data rate synchronized (18) as a function of said signal transition.

公开(公告)号：EP3098720A1

公开(公告)日：2016-11-30

申请号：EP15202773.6

申请日：2015-12-28

Applicant: STMicroelectronics S.r.l.

Inventor： MANGANO, Daniele ,  CONDORELLI, Riccardo ,  DISTEFANO, Gaetano

IPC: G06F13/42

CPC classification number: G06F13/4282 ,  G06F13/4027 ,  G06F13/4291

Abstract: A serial protocol interface in a communication device (MD) exchanging data (MOSI, MISO) over a communication link (121, 122, 123) is operated by:
- sending output data (MOSI) on (122) the communication link, and
- receiving input data (MISO) on (121) the communication link, these input data (MISO) being synchronous with a clock signal (SCK, SCLK) generated at the communication device (MD) and propagated (123) over the communication link (121, 122, 123),
- initializing operation by exchanging data over the communication link (121, 122, 123) by sending output data (MOSI) on the communication link (122) at a first data rate,
- detecting a signal transition in the input data (MISO) received on the communication link (121), and
- once such a transition is detected, exchanging data over the communication link (121, 122, 123) at a second data rate, higher than the first data, with the exchanging of data at a second data rate synchronized (18) as a function of said signal transition.

Abstract translation: 通过通信链路（121,122,123）交换数据（MOSI，MISO）的通信设备（MD）中的串行协议接口通过以下操作： - 在（122）通信链路上发送输出数据（MOSI），以及 - 在（121）通信链路上接收输入数据（MISO），这些输入数据（MISO）与在通信设备（MD）处生成并在通信链路（121）上传播（123）的时钟信号（SCK，SCLK）同步 ，122,123）， - 通过在所述通信链路（122）上以第一数据速率发送输出数据（MOSI），通过所述通信链路（121,122,123）交换数据来初始化操作， - 检测所述通信链路 在所述通信链路（121）上接收的输入数据（MISO），以及 - 一旦检测到所述转换，则以比所述第一数据高的第二数据速率在所述通信链路（121,122,123）上交换数据， 以作为所述信号转换的函数的第二数据速率交换数据（18）。