Abstract:
A CMOS integrated circuit is tested with the following steps: establishing a current threshold value (Ith), power the integrated circuit in static and idle conditions, measuring the current absorbed (IDDQ) by the integrated circuit and comparing this with the threshold value (Ith) and accepting or rejecting the integrated circuit if the comparison shows that the current absorbed measured (IDDQ) is respectively lower or higher than the threshold value (Ith). To improve discrimination between sound and faulty devices, the threshold value (Ith) is obtained from the following steps: forming two measurement transistors (Mn, Mp) in the integrated circuit, one n channel and the other p channel, biasing these in the cut-off zone and measuring their sub-threshold currents (Isubn, Isubp), calculating the sub-threshold currents by channel unit of area of the transistors of the integrated circuit using the sub-threshold currents measured (Isubn, Isubp) and the channel areas of the measurement transistors (Mn, Mp), obtaining the sum of the channel areas of the transistors that are cut off when the integrated circuit is idle in static conditions, calculating the current absorbed by the integrated circuit when idle in static conditions (IDDQ) using the result of the two operations described above and adding a pre-established current increase DELTA I to the current absorbed (IDDQ) in order to obtain the threshold value (Ith).
Abstract:
A CMOS integrated circuit is tested with the following steps: establishing a current threshold value (Ith), power the integrated circuit in static and idle conditions, measuring the current absorbed (IDDQ) by the integrated circuit and comparing this with the threshold value (Ith) and accepting or rejecting the integrated circuit if the comparison shows that the current absorbed measured (IDDQ) is respectively lower or higher than the threshold value (Ith). To improve discrimination between sound and faulty devices, the threshold value (Ith) is obtained from the following steps: forming two measurement transistors (Mn, Mp) in the integrated circuit, one n channel and the other p channel, biasing these in the cut-off zone and measuring their sub-threshold currents (Isubn, Isubp), calculating the sub-threshold currents by channel unit of area of the transistors of the integrated circuit using the sub-threshold currents measured (Isubn, Isubp) and the channel areas of the measurement transistors (Mn, Mp), obtaining the sum of the channel areas of the transistors that are cut off when the integrated circuit is idle in static conditions, calculating the current absorbed by the integrated circuit when idle in static conditions (IDDQ) using the result of the two operations described above and adding a pre-established current increase ΔI to the current absorbed (IDDQ) in order to obtain the threshold value (Ith).
Abstract:
A CMOS integrated circuit is tested by the following steps:
supplying the integrated circuit in static conditions, biasing the p-type body regions (9) with a potential (VBBN) more negative than the negative pole (VSS) of the supply and the n-type body regions (12) with a potential (VBBP) more positive than the positive pole (VDD) of the supply, setting a current threshold value (Ith), measuring the current (IDDQ) absorbed, comparing the current (IDDQ) measured with the threshold current (Ith), accepting or rejecting the integrated circuit if the comparison shows that the current (IDDQ) measured is less than or is greater than the threshold value (Ith), respectively.
Abstract:
A CMOS integrated circuit is tested by the following steps: supplying the integrated circuit in static conditions, biasing the p-type body regions (9) with a potential (VBBN) more negative than the negative pole (VSS) of the supply and the n-type body regions (12) with a potential (VBBP) more positive than the positive pole (VDD) of the supply, setting a current threshold value (Ith), measuring the current (IDDQ) absorbed, comparing the current (IDDQ) measured with the threshold current (Ith), accepting or rejecting the integrated circuit if the comparison shows that the current (IDDQ) measured is less than or is greater than the threshold value (Ith), respectively.
Abstract:
The circuit system comprises an integrated circuit which is one of a family of equivalent integrated circuits that comprises a first-generation integrated circuit (IC1g') operating at the supply voltage of the circuit system (V) and at least one subsequent-generation integrated circuit (IC2g') having a portion (A') operating at a lower voltage. The first-generation integrated circuit (IC1g') has a direct electrical connection (SC) between one (VDD1g) of the supply terminals and another terminal (VDD2g). The subsequent-generation integrated circuit (IC2g') has a voltage reducer with regulator (RG) the output of which is connected to the said other terminal (VDD2g). A filter capacitor (C) is connected between the said other terminal (VDD2g) and one (VSS) of the supply terminals.