公开(公告)号：EP1067558A1

公开(公告)日：2001-01-10

申请号：EP99830438.0

申请日：1999-07-08

Applicant: STMicroelectronics S.r.l.

Inventor： Dozza, Davide ,  Canegallo, Roberto ,  Borgatti, Michele

IPC: G11C16/10 ,  G11C16/26

CPC classification number: G11C16/10 ,  G11C16/26

Abstract: It is described a new method to codify the data for the writing of non volatile memory cells (6) included in a memory array (3). The method provides the following steps succession:

a) data to be memorized are initially sent to a small memory cell matrix (15) which acts as buffer;
b) a control logic (9) regulates the data flow between an input/output circuitry (8) of said memory array (3) and such small memory cells matrix buffer (15) and it provides to send the data to be memorised to a coder / decoder block (18);
c) the codified / decodified information by said coder / decoder block (18) is sent to an elaborator (20) which calculates the distance between two successive data combinations;
d) said control logic (9) indicates to a writing logic (22) the completion of the codification operation of the data to be stored in the memory array (3);
e) said writing logic (22) effects the programming of the memory array (3) cells (6) on the basis of the result of the calculus effectuated by said elaborator (20).

Abstract translation: 描述了一种编码用于写入存储器阵列（3）中的非易失性存储器单元（6）的数据的新方法。 该方法提供以下步骤：a）要存储的数据最初发送到作为缓冲器的小型存储单元矩阵（15）; b）控制逻辑（9）调节所述存储器阵列（3）的输入/输出电路（8）与所述小型存储单元矩阵缓冲器（15）之间的数据流，并且其提供将待存储的数据发送到 编码器/解码器块（18）; c）所述编码器/解码器块（18）的编码/解码信息被发送到计算两个连续数据组合之间的距离的精细器（20）; d）所述控制逻辑（9）向写入逻辑（22）指示要存储在存储器阵列（3）中的数据的编码操作的完成; e）所述写入逻辑（22）基于由所述精细器（20）所执行的微积分的结果来影响存储器阵列（3）单元（6）的编程。