公开(公告)号：US20030003347A1

公开(公告)日：2003-01-02

申请号：US10147353

申请日：2002-05-16

Applicant: STMicroelectronics S.r.l.

Inventor： Giuseppe D'Arrigo ,  Salvatore Coffa ,  Rosario Corrado Spinella

IPC: H01M004/86 ,  H01M008/10 ,  H01M004/92 ,  B05D005/12 ,  H01M004/88

CPC classification number: H01M8/241 ,  H01M8/1004 ,  H01M8/1007 ,  H01M2300/0082

Abstract: A fuel cell for an electrical load circuit includes a first monocrystalline silicon substrate and a positive half-cell formed therein, and a second monocrystalline silicon substrate and a positive half-cell formed therein. Each half-cell includes a microporous catalytic electrode permeable to a gas and connectable to the electrical load circuit. A cell area is defined on a surface of each respective monocrystalline silicon substrate, and includes a plurality of parallel trenches formed therein for receiving the gas to be fed to the respective microporous catalytic electrode. A cation exchange membrane separates the two microporous catalytic electrodes. Each half-cell includes a passageway for feeding the respective gas to the corresponding microporous catalytic electrode.

Abstract translation: 用于电负载电路的燃料电池包括第一单晶硅衬底和形成在其中的正半电池，以及形成在其中的第二单晶硅衬底和正半电池。 每个半电池包括可渗透气体并可连接到电负载电路的微孔催化电极。 在每个单晶硅衬底的表面上限定一个单元区域，并且包括多个平行的沟槽，用于接收要供给到各个微孔催化电极的气体。 阳离子交换膜分离两个微孔催化电极。 每个半电池包括用于将相应的气体供给到相应的微孔催化电极的通道。

公开(公告)号：US20010023094A1

公开(公告)日：2001-09-20

申请号：US09752149

申请日：2000-12-29

Applicant: STMicroelectronics S.r.l.

Inventor： Giuseppe D'Arrigo ,  Corrado Spinella ,  Salvatore Coffa ,  Giuseppe Arena ,  Marco Camalleri

IPC: H01L021/8238

CPC classification number: H01L21/3063 ,  C25F3/12 ,  H01L21/31662 ,  H01L21/32105 ,  H01L21/7624 ,  H01L21/76264 ,  H01L21/76286

Abstract: A method for fabricating a silicon-on-insulator (SOI) wafer that includes a monocrystalline silicon substrate with a doped region buried therein is provided. The method includes forming a plurality of trench-like openings extending from a surface of the substrate to the doped buried region, and selectively etching through the plurality of trench-like openings to change the doped buried region into a porous silicon region. The porous silicon region is oxidized to obtain an insulating region for the SOI wafer.

Abstract translation: 提供一种制造绝缘体上硅（SOI）晶片的方法，该方法包括其中埋有掺杂区的单晶硅衬底。 该方法包括形成从衬底的表面延伸到掺杂掩埋区的多个沟槽状开口，并且选择性地蚀刻穿过多个沟槽状开口以将掺杂掩埋区改变为多孔硅区。 多孔硅区域被氧化以获得用于SOI晶片的绝缘区域。