中科微点-全球专利检索

  1. Login
  2. Sign Up

Search Results

6 records (took 0.019 seconds)

    A loop-type voltage regulating device, particularly for automotive electric systems
    3.
    发明公开
    A loop-type voltage regulating device, particularly for automotive electric systems 有权
    电气系统中的机动车辆具有用于控制机动车辆的电压的电压调节器和方法

    公开(公告)号：EP1164057A1

    公开(公告)日：2001-12-19

    申请号：EP00126043.9

    申请日：2000-11-29

    Applicant: STMicroelectronics S.r.l.

    Inventor： Maggioni, Giampietro ,  Gallinari, Maurizio ,  Serratoni, Claudio ,  Morelli, Marco

    IPC: B60R16/02

    CPC classification number: H02J7/242 ,  B60R16/03 ,  H02J7/1446 ,  H02P9/305 ,  Y02T10/92

    Abstract: The invention relates to a loop-type voltage regulating device (10), particularly for regulating a voltage of an automotive electric system, being of a type which includes at least one thermal engine (15), a voltage regulator (13) and an alternator (11) operative to deliver a system regulated-voltage signal (A+) to and receive a regulation signal (DF) from the voltage regulator (13).
    Advantageously, according to the invention, the voltage regulating device further includes a control unit (14) within the regulating loop, which unit is connected between the thermal engine (15) and the voltage regulator (13) and is adapted to supply the latter with a signal related to the engine operation.

    Abstract translation: 本发明涉及的环型电压调节装置（10），特别是用于调节汽车电气系统的电压，作为一个类型，其包括至少一个热机（15），电压调节器（13）中，并在交流发电机 （11），用于提供一个系统调节电压信号（A +）和接收来自所述电压调节器（13）调节信号（DF）。 有利的是，雅丁到本发明，该电压调节装置还包括调节环内的控制单元（14），该单元被连接在热机（15）和所述电压调节器（13）之间并是angepasst与供给后期 与发动机操作的信号。

    Method and circuitry for generating a fault signal in a voltage regulator
    6.
    发明公开
    Method and circuitry for generating a fault signal in a voltage regulator 审中-公开
    Verfahren und Anordnung zur Erzeugung eines Fehlersignals in einem Spannungsregler

    公开(公告)号：EP1317046A1

    公开(公告)日：2003-06-04

    申请号：EP01830730.6

    申请日：2001-11-28

    Applicant: STMicroelectronics S.r.l.

    Inventor： Serratoni, Claudio ,  Gallinari, Maurizio ,  Maggioni, Giampietro

    IPC: H02J7/14

    CPC classification number: H02J7/1461

    Abstract: A method for generating a fault signal in a system voltage (Aplus) regulator by a phase signal (PH) is disclosed, which comprises the steps of:

    detecting the system voltage (Aplus) and phase signal (PH);
    comparing the system voltage (Aplus) and phase signal (PH) with respective fault levels (REG, Sfault); and
    generating a fault signal (Fault) upon either the system voltage (Aplus) or the phase signal (PH) falling below the respective fault level of the fault levels (REG, Sfault).

    Advantageously in this invention, the fault signal generating method further comprises a step of inhibiting the step of generating a fault signal (Fault) by means of a drive signal (DF) of the system voltage regulator.
    A diagnostic circuitry (10) for a system voltage regulator (1), implementing the inventive method, is also disclosed.

    Abstract translation: 公开了一种通过相位信号（PH）在系统电压（Aplus）调节器中产生故障信号的方法，其包括以下步骤：检测系统电压（Aplus）和相位信号（PH）; 将系统电压（Aplus）和相位信号（PH）与各自的故障级别（REG，Sfault）进行比较; 并且在系统电压（Aplus）或相位信号（PH）下降到故障级别（REG，Sfault）的相应故障级别之前产生故障信号（Fault）。 在本发明中有利的是，故障信号产生方法还包括通过系统电压调节器的驱动信号（DF）来抑制产生故障信号（Fault）的步骤的步骤。 还公开了实现本发明方法的用于系统电压调节器（1）的诊断电路（10）。

Patent Agency Ranking