公开(公告)号：EP2259327A3

公开(公告)日：2011-06-29

申请号：EP10180038.1

申请日：2002-11-14

Applicant: STMicroelectronics S.r.l.

Inventor： Magrì, Angelo ,  Frisina, Ferruccio

IPC: H01L29/78 ,  H01L21/336 ,  H01L21/265 ,  H01L29/872

CPC classification number: H01L29/66719 ,  H01L21/26586 ,  H01L29/0878 ,  H01L29/1095 ,  H01L29/41766 ,  H01L29/66712 ,  H01L29/66727 ,  H01L29/7806 ,  H01L29/7839 ,  H01L29/872

Abstract: An insulated gate planar power device with a Schottky diode in parallel thereto, said Schottky diode being realized by contacting with a metal layer a semiconductor substrate of a first type of conductivity and the contact zone being laterally surrounded by one or more diffused regions of opposite type of conductivity formed in said substrate for shielding the electric field under conditions of reverse bias of the diode, characterized in that it comprises, in said semiconducting substrate, a buried region doped with a dopant of opposite type of conductivity to that of said semiconductor substrate, geometrically located under said Schottky contact zone and at a greater depth than the depth of said diffused regions.
A relative process of fabrication is also disclosed.

公开(公告)号：EP2259327A2

公开(公告)日：2010-12-08

申请号：EP10180038.1

申请日：2002-11-14

Applicant: STMicroelectronics S.r.l.

Inventor： Magrì, Angelo ,  Frisina, Ferruccio

IPC: H01L29/78 ,  H01L21/336 ,  H01L21/265 ,  H01L29/872

CPC classification number: H01L29/66719 ,  H01L21/26586 ,  H01L29/0878 ,  H01L29/1095 ,  H01L29/41766 ,  H01L29/66712 ,  H01L29/66727 ,  H01L29/7806 ,  H01L29/7839 ,  H01L29/872

Abstract: An insulated gate planar power device with a Schottky diode in parallel thereto, said Schottky diode being realized by contacting with a metal layer a semiconductor substrate of a first type of conductivity and the contact zone being laterally surrounded by one or more diffused regions of opposite type of conductivity formed in said substrate for shielding the electric field under conditions of reverse bias of the diode, characterized in that it comprises, in said semiconducting substrate, a buried region doped with a dopant of opposite type of conductivity to that of said semiconductor substrate, geometrically located under said Schottky contact zone and at a greater depth than the depth of said diffused regions.
A relative process of fabrication is also disclosed.

Abstract translation: 于此与并联的肖特基二极管的绝缘栅平面功率器件，上述肖特基二极管由具有金属层的第一导电类型和接触区的半导体基片被尾盘反弹由相反类型的一个或多个扩散区域包围接触实现 在所说基片形成了二极管的反向偏置，在没有它包括为特征的条件下，屏蔽电场的导电性，在所述半导体衬底，掩埋区掺杂有相反类型导电性做了所述半导体基底中的掺杂剂时， 几何上位于下所述肖特基接触区域，并在比所述扩散区域的深度更大的深度。 因此制造的相对过程是游离缺失盘。