High integration density MOS technology power device structure
    2.
    发明公开
    High integration density MOS technology power device structure 失效
    MOS-Technologie-Leistungsanordnung mit hoher Integrationsdichte

    公开(公告)号:EP0961325A1

    公开(公告)日:1999-12-01

    申请号:EP98830321.0

    申请日:1998-05-26

    CPC classification number: H01L29/7811 H01L29/0696 H01L29/4238 H01L29/7802

    Abstract: High density MOS technology power device structure, comprising body regions (31A-31D) of a first conductivity type formed in a semiconductor layer (1) of a second conductivity type, characterized in that said body regions comprise at least one plurality of substantially rectilinear and substantially parallel body stripes (32) each joined at its ends to adjacent body stripes (32) by means of junction regions (33), so that said at least one plurality of body stripes (32) and said junction regions (33) form a continuous, serpentine-shaped body region (31A-31D).

    Abstract translation: 高密度MOS技术功率器件结构,包括形成在第二导电类型的半导体层(1)中的第一导电类型的主体区域(31A-31D),其特征在于,所述主体区域包括至少多个基本上直线和 大体上平行的主体条(32)各自通过结区(33)在其端部连接到相邻的主体条(32),使得所述至少一个多个体条(32)和所述连接区(33)形成 连续的蛇形体区域(31A-31D)。

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