BiCMOS/CMOS low drop voltage regulator
    2.
    发明公开
    BiCMOS/CMOS low drop voltage regulator 有权
    BICMOS / CMOS Spannungsregler mit kleiner Verlustspannung

    公开(公告)号:EP1061428A1

    公开(公告)日:2000-12-20

    申请号:EP99830374.7

    申请日:1999-06-16

    CPC classification number: G05F1/575

    Abstract: The invention relates to a low-drop type of voltage regulator (1) formed with BiCMOS/CMOS technology and being of the type which comprises: an input terminal (IN), receiving a stable voltage reference (Vrif) and being connected to one input (-) of an operational amplifier (2) through a switch controlled by a power-on enable signal (CE); a supply voltage reference (Vpos) powering the operational amplifier (2); an output transistor (M1) connected to an output (U) of the amplifier (2) to generate a regulated voltage value (Vreg) to be fed back to the amplifier (2) input; a second transistor (M2) connected in series between the output transistor (M1) and the supply voltage reference (Vpos). The regulator of this invention comprises a control circuit portion (7) connected between the control terminal of the second transistor (M2) and the supply voltage reference (Vpos) to prevent the breakdown of the output transistor (M1) from occurring.

    Abstract translation: 本发明涉及一种用BiCMOS / CMOS技术形成的低压型电压调节器(1),其特征在于包括:输入端(IN),接收稳定的电压基准(Vrif)并连接到一个输入端 ( - )通过由上电使能信号(CE)控制的开关; 为运算放大器(2)供电的电源电压参考(Vpos); 连接到放大器(2)的输出(U)的输出晶体管(M1),以产生要反馈到放大器(2)输入端的调节电压值(Vreg); 串联连接在输出晶体管(M1)和电源电压基准(Vpos)之间的第二晶体管(M2)。 本发明的调节器包括连接在第二晶体管(M2)的控制端和电源电压基准(Vpos)之间的控制电路部分(7),以防止输出晶体管(M1)的击穿。

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