公开(公告)号：EP0991081B1

公开(公告)日：2005-11-30

申请号：EP98203302.9

申请日：1998-09-30

Applicant: STMicroelectronics S.r.l.

Inventor： Peri, Maurizio ,  Brigati, Alessandro ,  Olivo, Marco

IPC: G11C16/06

CPC classification number: G11C16/102 ,  G11C16/16 ,  G11C2216/20

公开(公告)号：EP0991081A1

公开(公告)日：2000-04-05

申请号：EP98203302.9

申请日：1998-09-30

Applicant: STMicroelectronics S.r.l.

Inventor： Peri, Maurizio ,  Brigati, Alessandro ,  Olivo, Marco

IPC: G11C16/06

CPC classification number: G11C16/102 ,  G11C16/16 ,  G11C2216/20

Abstract: The invention relates to a method and device to emulate the features of a EEPROM memory device of the type included into a memory macrocell (1) which is embedded into an integrated circuit comprising also a microcontroller and including a Flash EEPROM memory structure formed by a predetermined number of sectors (F0, F1, F2, F3, F4, F5), characterized in that at least two sectors (E0, E1) of the Flash memory structure are used to emulate EEPROM byte alterability.

Abstract translation: 本发明涉及一种用于模拟包括在存储器宏单元（1）中的类型的EEPROM存储器件的特征的方法和装置，该存储器宏单元嵌入到还包括微控制器的集成电路中，并且包括由预定的 扇区数（F0，F1，F2，F3，F4，F5），其特征在于闪存结构的至少两个扇区（E0，E1）用于模拟EEPROM字节的可变性。