公开(公告)号：EP0954029A1

公开(公告)日：1999-11-03

申请号：EP98204129.5

申请日：1998-12-05

Applicant: STMicroelectronics S.r.l.

Inventor： Pio, Federico ,  Pizzuto, Olivier

IPC: H01L27/105 ,  H01L21/8239 ,  H01L21/8234

CPC classification number: H01L27/11526 ,  H01L27/105 ,  H01L27/11546

Abstract: A structure of electronic devices integrated in a semiconductor substrate with a first type of conductivity comprising at least a first HV transistor and at least a second LV transistor, each having a corresponding gate region. Said first HV transistor has lightly doped drain and source regions with a second type of conductivity, and said second LV transistor has respective drain and source regions with the second type of conductivity, each including a lightly doped portion adjacent to the respective gate region and a second portion which is more heavily doped and comprises a silicide layer.

Abstract translation: 集成在一个半导体衬底具有第一导电类型的至少一个包括第一晶体管HV和至少一个第二LV晶体管，各具有一个栅极对应区域的电子设备的结构。 所述第一HV晶体管具有轻掺杂漏极和源极区具有第二导电类型，和所述第二LV晶体管具有与所述第二导电类型的respectivement漏极和源极区域，每个区域包括一个轻掺杂部分毗邻respectivement栅极区和一个 第二部分全部被更重掺杂，并且包括硅化物层。