A BINARY-TO-GRAY CONVERSION CIRCUIT, RELATED FIFO MEMORY, INTEGRATED CIRCUIT AND METHOD

    公开(公告)号:EP3531560A1

    公开(公告)日:2019-08-28

    申请号:EP19157120.7

    申请日:2019-02-14

    Abstract: A Binary-to-Gray conversion circuit (240b is described. The Binary-to-Gray conversion circuit (240b) comprises:
    - an input configured to receive a first binary signal (PTR_target),
    - a register (61) configured to store a second binary signal (PTRf),
    - a prediction circuit (62) configured to receive at input said second binary signal (PTRf) and provide at output a set of binary candidate values (63a-63c), wherein the respective Gray equivalent of each binary candidate value (63a-63c) has a Hamming distance of one from the Gray equivalent of said second binary signal (PTRf),
    - an arbiter (66) configured to select one of said binary candidate values (63a-63c) as a function of said first binary signal (PTR_target) and said second binary signal (PTRf), wherein the selected binary candidate value is provided at input to said register (61);
    - an encoder block (68) configured to receive the selected binary candidate value and output the Gray encoded equivalent (PTR_gray) of the selected binary candidate value.

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