公开(公告)号：US20190341103A1

公开(公告)日：2019-11-07

申请号：US16393115

申请日：2019-04-24

Applicant: STMicroelectronics S.r.l.

Inventor： Giovanni Campardo ,  Roberto Annunziata ,  Paola Zuliani

IPC: G11C13/00

Abstract: A non-volatile memory device has a circuit branch associated to a bit line connected to a memory cell. When the memory cell is read, in a precharging step, the bit line is precharged. In a characteristic shift step, the memory cell is activated, and a current source is activated to supply a shift current to the first bit line and cause the bit line to charge or discharge on the basis of the datum stored in the memory cell. In a detection step, the current source is deactivated, the memory cell is decoupled, and the bit line is coupled to an input of a comparator stage that compares the voltage on the bit line with a reference voltage to supply an output signal indicating a datum stored in the memory cell.

公开(公告)号：US10706924B2

公开(公告)日：2020-07-07

申请号：US16393115

申请日：2019-04-24

Applicant: STMicroelectronics S.r.l.

Inventor： Giovanni Campardo ,  Roberto Annunziata ,  Paola Zuliani

IPC: G11C11/00 ,  G11C13/00

Abstract: A non-volatile memory device has a circuit branch associated to a bit line connected to a memory cell. When the memory cell is read, in a precharging step, the bit line is precharged. In a characteristic shift step, the memory cell is activated, and a current source is activated to supply a shift current to the first bit line and cause the bit line to charge or discharge on the basis of the datum stored in the memory cell. In a detection step, the current source is deactivated, the memory cell is decoupled, and the bit line is coupled to an input of a comparator stage that compares the voltage on the bit line with a reference voltage to supply an output signal indicating a datum stored in the memory cell.