公开(公告)号：EP1376861A3

公开(公告)日：2004-05-19

申请号：EP03076840.2

申请日：2003-06-13

Applicant: STMicroelectronics S.r.l.

Inventor： Cali', Giovanni ,  Pelleriti, Roberto ,  Torrisi, Felice

IPC: H03F3/45

CPC classification number: H03F3/45085 ,  H03F3/45089 ,  H03F2203/45296 ,  H03F2203/45392 ,  H03F2203/45394 ,  H03F2203/45702

Abstract: A device for converting a differential signal (Vin1, Vin2) to a single signal (Vout) is described. The device comprises at least one pair of transistors (Q1, Q2) having equal transconductance gain (gm) and which are arranged according a differential stage configuration. The transistors (Q1, Q2) have the differential signal (Vin1, Vin2) in input at the drivable terminals, have first non drivable terminals coupled respectively to first terminals of a first (R1) and a second (Rout) passive elements having second terminals connected with a first supply voltage (VDD), second non drivable terminals coupled to a second supply voltage (VEE) lower than the first supply voltage (VDD). The first terminal of the second passive element (Rout) is the output terminal (OUT) of the device. The last comprises a further transistor (Q3) having a first non drivable terminal connected with the output terminal (OUT) of the device, a second non drivable terminal coupled with said second supply voltage (VEE) and the drivable terminal connected with the first terminal of the first passive element (R1). The further transistor (Q3) has such a transconductance gain (gm3) that the product of said transconductance gain (gm3) by said first passive element (R1) is unitary.

公开(公告)号：EP1376861A2

公开(公告)日：2004-01-02

申请号：EP03076840.2

申请日：2003-06-13

Applicant: STMicroelectronics S.r.l.

Inventor： Cali', Giovanni ,  Pelleriti, Roberto ,  Torrisi, Felice

IPC: H03F3/45

CPC classification number: H03F3/45085 ,  H03F3/45089 ,  H03F2203/45296 ,  H03F2203/45392 ,  H03F2203/45394 ,  H03F2203/45702

Abstract: A device for converting a differential signal (Vin1, Vin2) to a single signal (Vout) is described. The device comprises at least one pair of transistors (Q1, Q2) having equal transconductance gain (gm) and which are arranged according a differential stage configuration. The transistors (Q1, Q2) have the differential signal (Vin1, Vin2) in input at the drivable terminals, have first non drivable terminals coupled respectively to first terminals of a first (R1) and a second (Rout) passive elements having second terminals connected with a first supply voltage (VDD), second non drivable terminals coupled to a second supply voltage (VEE) lower than the first supply voltage (VDD). The first terminal of the second passive element (Rout) is the output terminal (OUT) of the device. The last comprises a further transistor (Q3) having a first non drivable terminal connected with the output terminal (OUT) of the device, a second non drivable terminal coupled with said second supply voltage (VEE) and the drivable terminal connected with the first terminal of the first passive element (R1). The further transistor (Q3) has such a transconductance gain (gm3) that the product of said transconductance gain (gm3) by said first passive element (R1) is unitary.

Abstract translation: 描述用于将差分信号（Vin1，Vin2）转换为单个信号（Vout）的装置。 该器件包括具有相等跨导增益（gm）的至少一对晶体管（Q1，Q2），并且根据差分级配置布置。 晶体管（Q1，Q2）在可驱动端子处输入的差分信号（Vin1，Vin2）具有分别耦合到具有第二端子（R1）的第一端（R1）和第二（Rout）无源元件的第一不可驱动端子 与第一电源电压（VDD）连接，第二不可驱动端子耦合到低于第一电源电压（VDD）的第二电源电压（VEE）。 第二无源元件（Rout）的第一个端子是器件的输出端子（OUT）。 最后一个包括具有与该装置的输出端（OUT）连接的第一不可驱动端子的另一个晶体管（Q3），与所述第二电源电压（VEE）耦合的第二不可驱动端子和与第一端子 的第一无源元件（R1）。 另外的晶体管（Q3）具有这样的跨导增益（gm3），所述第一无源元件（R1）的所述跨导增益（gm3）的乘积是一体的。

公开(公告)号：EP1376861B1

公开(公告)日：2009-03-25

申请号：EP03076840.2

申请日：2003-06-13

Applicant: STMicroelectronics S.r.l.

Inventor： Cali', Giovanni ,  Pelleriti, Roberto ,  Torrisi, Felice

IPC: H03F3/45

CPC classification number: H03F3/45085 ,  H03F3/45089 ,  H03F2203/45296 ,  H03F2203/45392 ,  H03F2203/45394 ,  H03F2203/45702