公开(公告)号：EP1612565A2

公开(公告)日：2006-01-04

申请号：EP05105662.0

申请日：2005-06-24

Applicant: STMicroelectronics S.r.l. ,  STMicroelectronics, Inc.

Inventor： PASOLINI, Fabio ,  TRONCONI, Michele ,  LIN, Wen ,  RAASCH, William

IPC: G01P15/00 ,  G01P15/18 ,  G11B19/04

CPC classification number: G11B19/043 ,  G01P1/127 ,  G01P1/14 ,  G01P15/0891 ,  G01P15/18

Abstract: In an integrated free-fall detection device (16) for a portable apparatus (10), an acceleration sensor (20) generates acceleration signals (A x , A y , A z ) correlated to the components of the acceleration of the portable apparatus along three detection axes (x, y, z). A dedicated purely hardware circuit (24), connected to the acceleration sensor (20), generates in a continuous way and in real-time a free-fall detection signal (F). The free-fall detection signal (F) has a first logic value in the event that the acceleration signals (A x , A y , A z ) are simultaneously lower than a respective acceleration threshold (A th ), and is sent to a processor unit (18) of the portable apparatus (10) as an interrupt signal to activate appropriate actions of protection for the portable apparatus (10). The acceleration sensor (20) and the dedicated purely hardware circuit (24) are integrated in a single chip, and the acceleration sensor (20) is made as a MEMS.

Abstract translation: 在用于沿着相关的所述便携式装置的加速度的分量的加速度传感器（20）基因率加速度信号（A X，A Y，A Z）的便携式设备（10）集成的自由落体检测装置（16） 三个检测轴（x，Y，Z）。 连接到所述加速度传感器（20）一种专用的硬件纯电路（24），以连续的方式和在实时基因率自由下落检测信号（F）。 自由下落检测信号（F）具有在所述事件的第一逻辑值所做的加速度信号（A X，A Y，A Z）比一个respectivement加速度阈值（A th）的同时降低，并且被发送到处理器 便携式设备（10）的单元（18）以中断信号以激活所述便携式设备（10）的保护适当的行动。 加速度传感器（20）和专用硬件纯电路（24）被集成在单个芯片上，和加速度传感器（20）被制成为MEMS。

公开(公告)号：EP1612565A3

公开(公告)日：2006-09-20

申请号：EP05105662.0

申请日：2005-06-24

Applicant: STMicroelectronics S.r.l. ,  STMicroelectronics, Inc.

Inventor： PASOLINI, Fabio ,  TRONCONI, Michele ,  LIN, Wen ,  RAASCH, William

IPC: G01P15/00 ,  G01P15/18 ,  G11B19/04

CPC classification number: G11B19/043 ,  G01P1/127 ,  G01P1/14 ,  G01P15/0891 ,  G01P15/18

Abstract: In an integrated free-fall detection device (16) for a portable apparatus (10), an acceleration sensor (20) generates acceleration signals (A x , A y , A z ) correlated to the components of the acceleration of the portable apparatus along three detection axes (x, y, z). A dedicated purely hardware circuit (24), connected to the acceleration sensor (20), generates in a continuous way and in real-time a free-fall detection signal (F). The free-fall detection signal (F) has a first logic value in the event that the acceleration signals (A x , A y , A z ) are simultaneously lower than a respective acceleration threshold (A th ), and is sent to a processor unit (18) of the portable apparatus (10) as an interrupt signal to activate appropriate actions of protection for the portable apparatus (10). The acceleration sensor (20) and the dedicated purely hardware circuit (24) are integrated in a single chip, and the acceleration sensor (20) is made as a MEMS.

公开(公告)号：WO2006103246A1

公开(公告)日：2006-10-05

申请号：PCT/EP2006/061116

申请日：2006-03-28

Applicant: STMICROELECTRONICS S.R.L. ,  TRONCONI, Michele ,  CHIESA, Enrico ,  PASOLINI, Fabio

Inventor： TRONCONI, Michele ,  CHIESA, Enrico ,  PASOLINI, Fabio

IPC: H03H17/04

CPC classification number: H03H17/04 ,  G01P15/0891 ,  G01P15/18

Abstract: A digital high-pass filter (12) has an input (IN), an output (OUT), and a subtractor stage (20), having a first input terminal, a second input terminal and an output terminal. The first input terminal of the subtractor stage (20) is connected to the input (IN) of the digital high-pass filter (12) and the output terminal is connected to the output (OUT) of the digital high-pass filter (12). A recursive circuit branch (21) is connected between the output (OUT) of the digital high-pass filter (12) and the second input terminal of the subtractor stage (20). Within the recursive circuit branch (21) are cascaded an accumulation stage (23), constituted by an integrator circuit, and a divider stage (24). The cutoff frequency (f t ) of the digital high-pass filter (12) is variable according to a dividing factor (den) of the divider stage (24).

Abstract translation: 数字高通滤波器（12）具有输入（IN），输出（OUT）和减法器级（20），具有第一输入端，第二输入端和输出端。 减法器级（20）的第一输入端连接到数字高通滤波器（12）的输入（IN），输出端连接到数字高通滤波器（12）的输出端 ）。 递归电路分支（21）连接在数字高通滤波器（12）的输出（OUT）和减法器级（20）的第二输入端之间。 在递归电路分支（21）内，级联由积分器电路和分频器级（24）构成的累加级（23）。 数字高通滤波器（12）的截止频率（f ）根据分频器级（24）的分频因子（den）而变化。