"> Process for manufacturing an integrated device with
    2.
    发明公开
    Process for manufacturing an integrated device with "damascene" field insulation, and integrated device made by such process 审中-公开
    Herstellungsverfahrenfürein integriertes Bauelement mit“damaszener”Feldisolation

    公开(公告)号:EP2306509A1

    公开(公告)日:2011-04-06

    申请号:EP10182571.9

    申请日:2010-09-29

    Inventor: Colpani, Paolo

    Abstract: An integrated device includes a semiconductor body (11), in which an STI insulation structure (15) is formed, which delimits laterally first active areas (17) and at least one second active area (18), respectively, in a low-voltage region (12) and in a power region (13) of the semiconductor body (11). The integrated device moreover includes low-voltage CMOS components (50, 51), accommodated in the first active areas (17), and a power component (52) in the second active area (18). The power component (52) has a source region (45), a body region (32), a drain-contact region (46), and at least one field-insulating region (27), set between the body region (32) and the drain-contact region (46). The field-insulating region (27) is provided entirely on the semiconductor body (11).

    Abstract translation: 集成器件包括其中形成有STI绝缘结构(15)的半导体本体(11),其分别以低电压限制横向第一有源区域(17)和至少一个第二有效区域(18) 区域(12)和半导体本体(11)的功率区域(13)中。 集成器件还包括容纳在第一有源区(17)中的低电压CMOS元件(50,51)和第二有源区(18)中的功率元件(52)。 功率部件(52)具有源极区域(45),体区域(32),漏极接触区域(46)和至少一个场绝缘区域(27) 和漏极 - 接触区域(46)。 场绝缘区域(27)全部设置在半导体本体(11)上。

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