Abstract:
An integrated device includes a semiconductor body (11), in which an STI insulating structure (15) is formed, laterally delimiting first active areas (17) and at least one second active area (18) in a low-voltage region (12) and in a power region (13) of the semiconductor body, respectively. Low-voltage CMOS components (50, 51) are housed in the first active areas (17). Formed in the second active area (18) is a power component (52), which includes a source region (45), a body region (32), a drain-contact region (46), and at least one LOCOS insulation region (27), arranged between the body region (32) and the drain-contact region (46) and having a prominent portion (27a) that emerges from a surface (11a) of the semiconductor body (11), and an embedded portion (27b) inside it. The prominent portion (27a) of the LOCOS insulation region (27) has a volume greater than that of the embedded portion (27b).
Abstract:
An integrated device includes a semiconductor body (11), in which an STI insulation structure (15) is formed, which delimits laterally first active areas (17) and at least one second active area (18), respectively, in a low-voltage region (12) and in a power region (13) of the semiconductor body (11). The integrated device moreover includes low-voltage CMOS components (50, 51), accommodated in the first active areas (17), and a power component (52) in the second active area (18). The power component (52) has a source region (45), a body region (32), a drain-contact region (46), and at least one field-insulating region (27), set between the body region (32) and the drain-contact region (46). The field-insulating region (27) is provided entirely on the semiconductor body (11).