公开(公告)号：EP2339636B1

公开(公告)日：2019-03-13

申请号：EP10196923.6

申请日：2010-12-23

Applicant: STMicroelectronics Srl

Inventor： Zara, Fabio

IPC: H01L29/78 ,  H01L29/423 ,  H01L29/40 ,  H01L21/336 ,  H01L21/28 ,  H01L29/45 ,  H01L29/49

公开(公告)号：EP2339636A1

公开(公告)日：2011-06-29

申请号：EP10196923.6

申请日：2010-12-23

Applicant: STMicroelectronics Srl

Inventor： Zara, Fabio

IPC: H01L29/78 ,  H01L29/423 ,  H01L29/40 ,  H01L21/336 ,  H01L21/28 ,  H01L29/45 ,  H01L29/49

CPC classification number: H01L29/7827 ,  H01L21/2815 ,  H01L29/407 ,  H01L29/4236 ,  H01L29/42368 ,  H01L29/42372 ,  H01L29/42376 ,  H01L29/4238 ,  H01L29/456 ,  H01L29/4933 ,  H01L29/66734 ,  H01L29/7813

Abstract: The power device (100,200) has at least one deep trench (105,205) having at least one enlarged portion (105A) comprising a plurality of buried power contacts (125) and at least one narrow portion (105B) comprising a plurality of gate contacts (126), said contacts extending through a dielectric layer (111,211). The method comprises forming at least one gate region (108,208) and at least one buried source region (104,204), electrically insulated, through a single deposition of a conductive filling material (120,227) on the vertical walls of the deep trench and within an empty region (119) of said trench and, through etching of the conductive filling material forming a first spacer (121,221) and a second spacer (122,222) suitable for serving as a gate electrode (108,208) and forming a buried source electrode (104,204) within the empty region.

Abstract translation: 功率器件（100,200）具有至少一个深沟槽（105,205），其具有包括多个埋入式电源触头（125）的至少一个扩大部分（105A）和至少一个包括多个栅极触点（105B）的窄部分（105B） 126），所述触点延伸穿过电介质层（111,211）。 该方法包括通过导电填充材料（120,227）在深沟槽的垂直壁上的单次沉积和在空的垂直壁内形成至少一个栅极区域（108,208）和至少一个电绝缘的掩埋源区域（104,204） 并且通过蚀刻形成第一间隔物（121,221）的导电填充材料和适合用作栅电极（108,208）并在其内形成掩埋源电极（104,204）的第二间隔物（122,222） 空的地区。