公开(公告)号：JPH08139584A

公开(公告)日：1996-05-31

申请号：JP24709495

申请日：1995-09-26

Applicant: SYMBIOS LOGIC INC

Inventor： MAIKERU JIEI MAKUMANASU ,  FUIRITSUPU DABURIYU BURINGAA ,  ANDORE AARU TEIIN ,  JIERARUDO AARU HAAGU ,  HOON PII NIYUEN

IPC: H01L29/00 ,  H03K19/003

Abstract: PROBLEM TO BE SOLVED: To reduce power consumption by providing a first means supplying power to a protection device when it is in a power on state and a second means supplying power to the protection device when it is in a power off state. SOLUTION: When the power of an I/O circuit is turned on, a transistor 306 supplies Vdd voltage to the gates of transistors 307 and 304. Then, the gates of the transistors 307 and 304 are closed and the I/O circuit is protected. When the power of the I/O circuit is turned off, Vdd is not supplied from a power source and a 5 V signal (transient voltage) is given from an external circuit 1 to an I/O pad 300. At that time, transistors 301 and 302 protect the other parts of the I/O circuit. 5 V added to the pad 300 is reduced by the thresholds of a pair of diodes 310 and 311 and it becomes almost 3 V. The signal of a PUX circuit is used for preventing current passing through the pad 300 through the transistors 301 and 302 during the regular state.