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公开(公告)号:JPH08297628A
公开(公告)日:1996-11-12
申请号:JP6066796
申请日:1996-03-18
Applicant: SYMBIOS LOGIC INC
Inventor: RICHIYAADO DEII KAAMAIKERU , JIYOERU EMU UOODO , MAIKERU EE UINCHIERU
Abstract: PROBLEM TO BE SOLVED: To improve the inputting/outputting performance of a computer system under the control of the multisleded operating system of a multitasking. SOLUTION: This is a device and method for chaining the continuous DMA distributed collection sub-block of a PRD table for a channel 0 with the continuous DMA distributed collection sub-block of the PRD table for a channel 1 while maintaining the maximum media band width by using a single data manager 124. The DMA block transfer is scheduled based on the validity of data from the buffer memory of an I/O device, so that the idle time of a media or a network can be minimized, and the idle time of an I/O bus can be minimized. Thus, almost the maximum aggregate band width of multiple I/O buses and devices related with them can be obtained.