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公开(公告)号:US20250169239A1
公开(公告)日:2025-05-22
申请号:US18946689
申请日:2024-11-13
Applicant: Samsung Display Co., LTD.
Inventor: HANUL LEE , PIL GYU KANG , HYUN-CHUL PARK , YOUNGHOON YOO , EUNA YU , JEONGHYUN LEE , SANGCHEON HAN
IPC: H01L33/38 , H01L25/075
Abstract: A display device includes an active layer above a substrate, including a conductive area, and defining at least one hole, a contact electrode electrically connected to the conductive area, and having a shape that surrounds at least a portion of the hole in a plan view, and a light-emitting diode above the contact electrode, and electrically connected to the contact electrode.
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公开(公告)号:US20250151523A1
公开(公告)日:2025-05-08
申请号:US18915227
申请日:2024-10-14
Applicant: Samsung Display Co., Ltd.
Inventor: SUNGJAE MOON , YOUNGHOON YOO , JIN-WON LEE
IPC: H10K59/121 , H10K59/124 , H10K59/126 , H10K59/131
Abstract: A display panel is proved. The display panel including a base layer, a light blocking pattern on the base layer, a semiconductor pattern not overlapping the light blocking pattern, a lower capacitor pattern including a first portion overlapping the light blocking pattern and a second portion protruding in a first direction from the first portion and overlapping the semiconductor pattern, an upper capacitor pattern overlapping the lower capacitor pattern, and a light-emitting element connected to the semiconductor pattern. The light blocking pattern includes a lower surface facing the base layer, an upper surface opposed to the lower surface, and a side surface connecting the lower surface and the upper surface. The upper capacitor pattern faces the semiconductor pattern in the first direction.
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公开(公告)号:US20220415986A1
公开(公告)日:2022-12-29
申请号:US17700195
申请日:2022-03-21
Applicant: Samsung Display Co., Ltd.
Inventor: HYUNGGI JUNG , YONGDUCK SON , SOON CHANG YEON , YOUNGHOON YOO , JAEMIN LEE , DOGI LIM , SOOJIN JEONG , HYUNGTAE JUNG
IPC: H01L27/32
Abstract: A transistor is disclosed that includes a substrate, an active layer, a gate electrode, a first electrode, a second electrode, and a first connection electrode. The active includes a first region, a second region, and a channel region between the first region and the second region. The gate electrode is disposed on the active layer and overlaps the channel region. The first electrode is disposed on the substrate and electrically connects to the first region. The second electrode is disposed on the substrate and electrically connects to the second region. The first connection electrode is disposed on the substrate and electrically connects the gate electrode and the second electrode.
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