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公开(公告)号:US20250143121A1
公开(公告)日:2025-05-01
申请号:US18889210
申请日:2024-09-18
Applicant: Samsung Display Co., LTD.
Inventor: Dong Hwan SHIM , Kwang Woo PARK , Eon Joo LEE , Jin Yong LEE , Cheol JANG , Yong Seon JO
IPC: H10K59/131 , H10K59/124
Abstract: A display device includes a first sub-display area and a second sub-display area that are adjacent each other, and a main display area around the first and second sub-display areas, a plurality of pixel electrodes in the main display area and spaced from one another, a plurality of first subpixel electrodes in the first sub-display area and spaced from one another, a plurality of first copy pixel electrodes in the first sub-display area and connected to the first subpixel electrodes through first bridge electrodes, a plurality of planarization patterns in the second sub-display area, a plurality of second subpixel electrodes and a plurality of second copy pixel electrodes in the second sub-display area that overlaps the planarization patterns, and a plurality of second bridge electrodes that overlaps the second subpixel electrodes or the second copy pixel electrodes.
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公开(公告)号:US20240292675A1
公开(公告)日:2024-08-29
申请号:US18500891
申请日:2023-11-02
Applicant: Samsung Display Co., Ltd.
Inventor: Dong Hwan SHIM , Kwang Woo PARK , Eon Joo LEE , Jin Yong LEE , Cheol JANG , Yong Seon JO
IPC: H10K59/124
CPC classification number: H10K59/124
Abstract: A display device includes: a substrate; an insulating film on the substrate and having an isolation groove defining a first isolated area and a second isolated area; a first transistor in the first isolated area; and a pixel electrode connected to the first transistor and overlapping the isolation groove.
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公开(公告)号:US20220216280A1
公开(公告)日:2022-07-07
申请号:US17463785
申请日:2021-09-01
Applicant: Samsung Display Co., LTD.
Inventor: Yong Seon JO
Abstract: A display device includes: a substrate; a semiconductor disposed on the substrate; a first gate insulating layer disposed on the semiconductor; a gate electrode disposed on the first gate insulating layer; a second gate insulating layer disposed on the gate electrode; a first storage electrode disposed on the second gate insulating layer; a first interlayer insulating layer disposed on the first storage electrode, where an opening is defined through the first interlayer insulating layer to surround the semiconductor, the gate electrode and the first storage electrode; and a second interlayer insulating layer disposed on the first interlayer insulating layer and disposed in the opening, where the second interlayer insulating layer includes an organic material.
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