公开(公告)号：US20240143237A1

公开(公告)日：2024-05-02

申请号：US18493212

申请日：2023-10-24

Applicant: Samsung Electronics Co., Ltd.

Inventor： Daehun YU ,  Sungwook KIM ,  Byungyo LEE

IPC: G06F3/06

CPC classification number: G06F3/0659 ,  G06F3/0613 ,  G06F3/0634 ,  G06F3/0679

Abstract: Provided is a storage device including a memory, a plurality of non-volatile memories of which an access speed is slower than that of the memory, and a controller configured to control a first data input/output operation with a host device using the plurality of non-volatile memories, based on a first map table stored in the memory, in a first mode, and control a second data input/output operation with the host device using the memory, based on a second map table stored in the memory, in a second mode.

公开(公告)号：US20220158877A1

公开(公告)日：2022-05-19

申请号：US17511186

申请日：2021-10-26

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Youngsan KANG ,  Byungyo LEE

IPC: H04L25/03 ,  H04L25/06 ,  H04L25/02

Abstract: An interconnect module device is provided. The interconnect module device includes a line control command (LCC) detecting circuit configured to identify an LCC signal; an equalizer control circuit configured to generate a control signal based on the LCC signal; a receiving equalizer configured to perform receiving equalization on a first signal received from a first universal flash storage (UFS) device based on the control signal to generate a second signal; and a transmitting equalizer configured to perform transmitting equalization on the second signal to generate a third signal based on the control signal, and transmit the third signal to a second UFS device.