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    SEMICONDUCTOR DEVICE INCLUDING THROUGH VIA
    4.
    发明申请
    SEMICONDUCTOR DEVICE INCLUDING THROUGH VIA 有权

    公开(公告)号：US20250167107A1

    公开(公告)日：2025-05-22

    申请号：US18775049

    申请日：2024-07-17

    Applicant: Samsung Electronics Co., Ltd.

    Inventor： Hyungeun Choi ,  Taejin Park ,  Suklae Kim ,  Cheonbae Kim ,  Sungsoo Yim ,  Yoona Jang ,  Hyunyong Jeong

    IPC: H01L23/522 ,  G11C5/06 ,  H01L23/528 ,  H10B12/00

    Abstract: A semiconductor device is provided. The semiconductor device includes a first structure having a memory block region and an extension region; and a second structure having a peripheral circuit region. The first structure includes memory cells and a word line. The second structure includes a semiconductor body; a through-insulating pattern in the semiconductor body; and a peripheral transistor. The first and second structures include a word line signal path electrically connecting the word line to the peripheral transistor. The word line signal path includes a word line contact that is in contact with the word line in the extension region; a word line routing lower structure electrically connected to the word line contact and extending from the extension region into the memory block region; and a word line routing connection structure electrically connecting the word line routing lower structure to the word line routing peripheral structure.

    SEMICONDUCTOR DEVICE INCLUDING WORD LINE SIGNAL PATH
    6.
    发明申请
    SEMICONDUCTOR DEVICE INCLUDING WORD LINE SIGNAL PATH 有权

    公开(公告)号：US20250169066A1

    公开(公告)日：2025-05-22

    申请号：US18826334

    申请日：2024-09-06

    Applicant: Samsung Electronics Co., Ltd.

    Inventor： Daesun Kim ,  Suklae Kim ,  Cheonbae Kim ,  Youngseok Park ,  Taejin Park ,  Hyunchul Yoon ,  Hyeonkyu Lee ,  Sungsoo Yim ,  Hyungeun Choi

    IPC: H10B12/00 ,  G11C11/408 ,  G11C11/4091 ,  H01L23/00 ,  H01L25/065 ,  H01L25/18

    Abstract: Provided is a semiconductor device. The semiconductor device includes: a first connection region, a first memory block region, and a second connection region sequentially arranged; a first peripheral circuit region vertically overlapping with the first memory block region; first memory cells in the first memory block region; a first word line extending into the first and second connection regions by crossing the first memory block region, and electrically connected to the first memory cells; a first sub-word line driver in the first peripheral circuit region; and a first word line signal path electrically connecting the first word line and the first sub-word line driver. The first word line signal path includes at least one first routing contact coupled to the first word line in the first connection region, and at least one second routing contact coupled to the first word line in the second connection region.

    Semiconductor memory device
    8.
    发明授权
    Semiconductor memory device 有权

    公开(公告)号：US11289488B2

    公开(公告)日：2022-03-29

    申请号：US16744572

    申请日：2020-01-16

    Applicant: Samsung Electronics Co., Ltd.

    Inventor： Joongchan Shin ,  Jiyoung Kim ,  Hui-Jung Kim ,  Taehyun An ,  Eunju Cho ,  Hyungeun Choi ,  Sangyeon Han

    IPC: H01L27/108 ,  G11C5/06

    Abstract: Disclosed is a semiconductor memory device including a stack structure including layers which are vertically stacked on a substrate and each of which includes a bit line extending in a first direction and a semiconductor pattern extending in a second direction from the bit line, a gate electrode which is in a hole penetrating the stack structure and extending along a stack of semiconductor patterns, a vertical insulating layer covering the gate electrode and filling the hole, and a data storage element electrically connected to the semiconductor pattern. The data storage element includes a first electrode, which is in a first recess of the vertical insulating layer and has a cylindrical shape whose one end is opened, and a second electrode, which includes a first protrusion in a cylinder of the first electrode and a second protrusion in a second recess of the vertical insulating layer.

    SEMICONDUCTOR DEVICES HAVING CONNECTING CONDUCTIVE LINES
    10.
    发明申请
    SEMICONDUCTOR DEVICES HAVING CONNECTING CONDUCTIVE LINES 有权

    公开(公告)号：US20250157925A1

    公开(公告)日：2025-05-15

    申请号：US18675252

    申请日：2024-05-28

    Applicant: Samsung Electronics Co., Ltd.

    Inventor： Hyungeun Choi ,  Jinwoo Han ,  Seokhan Park

    IPC: H01L23/528 ,  H10B12/00

    Abstract: A semiconductor device includes: a substrate including a memory cell region and a contact region; active layers extending in a first horizontal direction and stacked to be spaced apart from each other in a vertical direction on the memory cell region; gate electrodes disposed between the active layers, extending in a second horizontal direction, and stacked to be spaced apart from each other in the vertical direction; connecting conductive lines extending in the first horizontal direction and stacked to be spaced apart from each other in the vertical direction, on the contact region; and vertical conductive patterns extending in the vertical direction and in contact with the active layers, on the memory cell region. Each of the connecting conductive lines are disposed on the same level, among the gate electrodes, and are in contact with the gate electrodes spaced apart from each other in the first horizontal direction.

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