公开(公告)号：US09389940B2

公开(公告)日：2016-07-12

申请号：US13780248

申请日：2013-02-28

Applicant: Silicon Graphics International Corp.

Inventor： Mark Larson ,  Michael Brown ,  Gary Meyer

IPC: G06F11/00 ,  G06F11/07

CPC classification number: G06F11/0772 ,  G06F11/0724 ,  G06F11/25

Abstract: Error data is read from error registers and written into a buffer. A computing node uses a BIOS to read the error data, rearm the error register and write the data into a memory mapped buffer. A hub chip supports creation of a shared memory system of computing nodes. A management controller in the computing node extracts error data from the buffer. The error data preferably consists essentially of the error register identifiers and the contents of the error registers. A system management node receives the error data from the management controllers in the computing nodes. The system management node may be coupled to but separate from the computing nodes.

Abstract translation: 错误数据从错误寄存器中读取并写入缓冲区。 计算节点使用BIOS读取错误数据，重新设置错误寄存器并将数据写入存储器映射缓冲区。 集线器芯片支持创建计算节点的共享存储器系统。 计算节点中的管理控制器从缓冲器中提取错误数据。 错误数据优选地基本上由错误寄存器标识符和错误寄存器的内容组成。 系统管理节点从计算节点中的管理控制器接收错误数据。 系统管理节点可以耦合到但是与计算节点分离。

公开(公告)号：US20160283309A1

公开(公告)日：2016-09-29

申请号：US15177609

申请日：2016-06-09

Applicant: Silicon Graphics International Corp.

Inventor： Mark Larson ,  Michael Brown ,  Gary Meyer

IPC: G06F11/07 ,  G06F3/06

CPC classification number: G06F11/0772 ,  G06F11/0724 ,  G06F11/25

Abstract: Error data is read from error registers and written into a buffer. A computing node uses a BIOS to read the error data, rearm the error register and write the data into a memory mapped buffer. A hub chip supports creation of a shared memory system of computing nodes. A management controller in the computing node extracts error data from the buffer. The error data preferably consists essentially of the error register identifiers and the contents of the error registers. A system management node receives the error data from the management controllers in the computing nodes. The system management node may be coupled to but separate from the computing nodes.

Abstract translation: 错误数据从错误寄存器中读取并写入缓冲区。 计算节点使用BIOS读取错误数据，重新设置错误寄存器并将数据写入存储器映射缓冲区。 集线器芯片支持创建计算节点的共享存储器系统。 计算节点中的管理控制器从缓冲器中提取错误数据。 错误数据优选地基本上由错误寄存器标识符和错误寄存器的内容组成。 系统管理节点从计算节点中的管理控制器接收错误数据。 系统管理节点可以耦合到但是与计算节点分离。

公开(公告)号：US20140245079A1

公开(公告)日：2014-08-28

申请号：US13780248

申请日：2013-02-28

Applicant: Silicon Graphics International Corp.

Inventor： Mark Larson ,  Michael Brown ,  Gary Meyer

IPC: G06F11/07

CPC classification number: G06F11/0772 ,  G06F11/0724 ,  G06F11/25

Abstract: Error data is read from error registers and written into a buffer. A computing node uses a BIOS to read the error data, rearm the error register and write the data into a memory mapped buffer. A hub chip supports creation of a shared memory system of computing nodes. A management controller in the computing node extracts error data from the buffer. The error data preferably consists essentially of the error register identifiers and the contents of the error registers. A system management node receives the error data from the management controllers in the computing nodes. The system management node may be coupled to but separate from the computing nodes.

Abstract translation: 错误数据从错误寄存器中读取并写入缓冲区。 计算节点使用BIOS读取错误数据，重新设置错误寄存器并将数据写入存储器映射缓冲区。 集线器芯片支持创建计算节点的共享存储器系统。 计算节点中的管理控制器从缓冲器中提取错误数据。 错误数据优选地基本上由错误寄存器标识符和错误寄存器的内容组成。 系统管理节点从计算节点中的管理控制器接收错误数据。 系统管理节点可以耦合到但是与计算节点分离。