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    SYSTEM AND METHOD FOR CONVEYING INFORMATION
    1.
    发明申请
    SYSTEM AND METHOD FOR CONVEYING INFORMATION 有权
    用于传送信息的系统和方法

    公开(公告)号：US20140337691A1

    公开(公告)日：2014-11-13

    申请号：US14335735

    申请日：2014-07-18

    Applicant: Silicon Graphics International Corp.

    Inventor： Steven C. Miller ,  Thomas Edward McGee ,  Bruce Alan Strangfeld

    IPC: H03M13/05

    CPC classification number: H03M13/05 ,  G06F13/4217 ,  G06F15/16

    Abstract: A system and method for conveying data include the capability to determine whether a transaction request credit has been received at a computer module, the transaction request credit indicating that at least a portion of a transaction request message may be sent. The system and method also include the capability to determine, of a transaction request message is to be sent, whether at least a portion of the transaction request message may be sent and to send the at least a portion of the transaction request message if it may be sent.

    Abstract translation: 用于传送数据的系统和方法包括确定在计算机模块处是否已经接收到交易请求信用的能力，指示可以发送交易请求消息的至少一部分的交易请求信用。 该系统和方法还包括确定事务请求消息将被发送的能力，是否可以发送交易请求消息的至少一部分，并且如果可以发送交易请求消息的至少一部分 被发送。

    System and method for conveying information
    2.
    发明授权
    System and method for conveying information 有权
    用于传达信息的系统和方法

    公开(公告)号：US08812721B2

    公开(公告)日：2014-08-19

    申请号：US13705087

    申请日：2012-12-04

    Applicant: Silicon Graphics International Corp.

    Inventor： Steven C. Miller ,  Thomas Edward McGee ,  Bruce Alan Strangfeld

    IPC: G06F15/16 ,  G06F15/167 ,  H04J3/16 ,  G06F3/00 ,  G06F13/00

    CPC classification number: H03M13/05 ,  G06F13/4217 ,  G06F15/16

    Abstract: A system and method for conveying data include the capability to determine whether a transaction request credit has been received at a computer module, the transaction request credit indicating that at least a portion of a transaction request message may be sent. The system and method also include the capability to determine, of a transaction request message is to be sent, whether at least a portion of the transaction request message may be sent and to send the at least a portion of the transaction request message if it may be sent.

    Abstract translation: 用于传送数据的系统和方法包括确定在计算机模块处是否已经接收到交易请求信用的能力，指示可以发送交易请求消息的至少一部分的交易请求信用。 该系统和方法还包括确定事务请求消息将被发送的能力，是否可以发送交易请求消息的至少一部分，并且如果可以发送交易请求消息的至少一部分 被发送。

    High performance system that includes reconfigurable protocol tables within an ASIC wherein a first protocol block implements an inter-ASIC communications protocol and a second block implements an intra-ASIC function
    3.
    发明授权
    High performance system that includes reconfigurable protocol tables within an ASIC wherein a first protocol block implements an inter-ASIC communications protocol and a second block implements an intra-ASIC function 有权
    包括ASIC内的可重配置协议表的高性能系统，其中第一协议块实现ASIC间通信协议，第二块实现ASIC内部功能

    公开(公告)号：US09122816B2

    公开(公告)日：2015-09-01

    申请号：US14542023

    申请日：2014-11-14

    Applicant: Silicon Graphics International Corp.

    Inventor： Thomas Edward McGee

    IPC: G06F13/00 ,  G06F13/42

    CPC classification number: G06F13/4282 ,  G06F13/385 ,  Y02D10/14 ,  Y02D10/151

    Abstract: A high performance computing system is provided with an ASIC that communicates with another device in the system according to a protocol defined by the other device. The ASIC is coupled to a reconfigurable protocol table, in the form of a high speed content-addressable memory (“CAM”). The CAM includes instructions to control the execution of the protocol by the ASIC. The CAM may include instructions to control the ASIC in the event that unanticipated signals or other errors are encountered while executing the protocol. Internal ASIC state data may be routed to the CAM to permit the ASIC to generate a reasonable response to errors either in the design or fabrication of the ASIC or the device with which it is communicating.

    Abstract translation: 高性能计算系统提供有ASIC，其根据由另一设备定义的协议与系统中的另一设备进行通信。 ASIC以高速内容可寻址存储器（“CAM”）的形式耦合到可重配置协议表。 CAM包括用于控制由ASIC执行协议的指令。 CAM可以包括在执行协议时遇到意外的信号或其他错误的情况下控制ASIC的指令。 内部ASIC状态数据可以路由到CAM，以允许ASIC在ASIC或其正在通信的设备的设计或制造中产生对错误的合理响应。

    High performance system that includes reconfigurable protocol tables within an ASIC wherein a first protocol block implements an inter-ASIC communications protocol and a second block implements an intra-ASIC function
    4.
    发明授权
    High performance system that includes reconfigurable protocol tables within an ASIC wherein a first protocol block implements an inter-ASIC communications protocol and a second block implements an intra-ASIC function 有权
    包括ASIC内的可重配置协议表的高性能系统，其中第一协议块实现ASIC间通信协议，第二块实现ASIC内部功能

    公开(公告)号：US08892805B2

    公开(公告)日：2014-11-18

    申请号：US13788281

    申请日：2013-03-07

    Applicant: Silicon Graphics International Corp.

    Inventor： Thomas Edward McGee

    IPC: G06F13/00

    CPC classification number: G06F13/4282 ,  G06F13/385 ,  Y02D10/14 ,  Y02D10/151

    Abstract: A high performance computing system is provided with an ASIC that communicates with another device in the system according to a protocol defined by the other device. The ASIC is coupled to a reconfigurable protocol table, in the form of a high speed content-addressable memory (“CAM”). The CAM includes instructions to control the execution of the protocol by the ASIC. The CAM may include instructions to control the ASIC in the event that unanticipated signals or other errors are encountered while executing the protocol. Internal ASIC state data may be routed to the CAM to permit the ASIC to generate a reasonable response to errors either in the design or fabrication of the ASIC or the device with which it is communicating.

    Abstract translation: 高性能计算系统提供有ASIC，其根据由另一设备定义的协议与系统中的另一设备进行通信。 ASIC以高速内容可寻址存储器（“CAM”）的形式耦合到可重配置协议表。 CAM包括用于控制由ASIC执行协议的指令。 CAM可以包括在执行协议时遇到意外的信号或其他错误的情况下控制ASIC的指令。 内部ASIC状态数据可以路由到CAM，以允许ASIC在ASIC或其正在通信的设备的设计或制造中产生对错误的合理响应。

    Reconfigurable Protocol Tables Within An ASIC
    5.
    发明申请
    Reconfigurable Protocol Tables Within An ASIC 有权
    一个ASIC内的可重构协议表

    公开(公告)号：US20140258679A1

    公开(公告)日：2014-09-11

    申请号：US13788281

    申请日：2013-03-07

    Applicant: SILICON GRAPHICS INTERNATIONAL CORP.

    Inventor： Thomas Edward McGee

    IPC: G06F15/78

    CPC classification number: G06F13/4282 ,  G06F13/385 ,  Y02D10/14 ,  Y02D10/151

    Abstract: A high performance computing system is provided with an ASIC that communicates with another device in the system according to a protocol defined by the other device. The ASIC is coupled to a reconfigurable protocol table, in the form of a high speed content-addressable memory (“CAM”). The CAM includes instructions to control the execution of the protocol by the ASIC. The CAM may include instructions to control the ASIC in the event that unanticipated signals or other errors are encountered while executing the protocol. Internal ASIC state data may be routed to the CAM to permit the ASIC to generate a reasonable response to errors either in the design or fabrication of the ASIC or the device with which it is communicating.

    Abstract translation: 高性能计算系统提供有ASIC，其根据由另一设备定义的协议与系统中的另一设备进行通信。 ASIC以高速内容可寻址存储器（“CAM”）的形式耦合到可重配置协议表。 CAM包括用于控制由ASIC执行协议的指令。 CAM可以包括在执行协议时遇到意外的信号或其他错误的情况下控制ASIC的指令。 内部ASIC状态数据可以路由到CAM，以允许ASIC在ASIC或其正在通信的设备的设计或制造中产生对错误的合理响应。

    Reconfigurable Protocol Tables Within An ASIC
    7.
    发明申请
    Reconfigurable Protocol Tables Within An ASIC 有权
    一个ASIC内的可重构协议表

    公开(公告)号：US20150074375A1

    公开(公告)日：2015-03-12

    申请号：US14542023

    申请日：2014-11-14

    Applicant: Silicon Graphics International Corp.

    Inventor： Thomas Edward McGee

    IPC: G06F15/78 ,  G06F13/42

    CPC classification number: G06F13/4282 ,  G06F13/385 ,  Y02D10/14 ,  Y02D10/151

    Abstract: A high performance computing system is provided with an ASIC that communicates with another device in the system according to a protocol defined by the other device. The ASIC is coupled to a reconfigurable protocol table, in the form of a high speed content-addressable memory (“CAM”). The CAM includes instructions to control the execution of the protocol by the ASIC. The CAM may include instructions to control the ASIC in the event that unanticipated signals or other errors are encountered while executing the protocol. Internal ASIC state data may be routed to the CAM to permit the ASIC to generate a reasonable response to errors either in the design or fabrication of the ASIC or the device with which it is communicating.

    Abstract translation: 高性能计算系统提供有ASIC，其根据由另一设备定义的协议与系统中的另一设备进行通信。 ASIC以高速内容可寻址存储器（“CAM”）的形式耦合到可重配置协议表。 CAM包括用于控制由ASIC执行协议的指令。 CAM可以包括在执行协议时遇到意外的信号或其他错误的情况下控制ASIC的指令。 内部ASIC状态数据可以路由到CAM，以允许ASIC在ASIC或其正在通信的设备的设计或制造中产生对错误的合理响应。

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