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公开(公告)号:JPS59231731A
公开(公告)日:1984-12-26
申请号:JP10539983
申请日:1983-06-13
Applicant: SONY CORP
Inventor: UCHIDA HIROYUKI , SUGITA JIYUNKICHI , HAYATA YUTAKA , SEKIYA TETSUO
Abstract: PURPOSE:To measure the head position to a tape with high precision by providing an auxiliary head at a prescribed position of a multi-track recording head device as well as a pair of heads to a multi-track reproducing head device. CONSTITUTION:When the positions of a recording head device 1 and a reproducing head device 2 are controlled to a tape 10, a rough control is carried out so as to shift both devices 1 and 2 to their prescribed positions in the width direction of the tape 10. Then the tape 10 is driven toward an arrow (a), and at the same time a prescribed reference signal is supplied to an auxiliary head 4. Thus an auxiliary track 11 is formed on the side A of the tape 10. This track 11 is reproduced by an auxiliary head 61 with an equal level of reproduction secured between heads 611 and 612. In other words, the device 2 is controlled in the width direction of the tape 10 to secure an equal width of reproduction to the track 11 between the heads 611 and 612.
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公开(公告)号:JPS58171706A
公开(公告)日:1983-10-08
申请号:JP5368482
申请日:1982-04-02
Applicant: SONY CORP
Inventor: SEKO SATORU , SUGITA JIYUNKICHI
Abstract: PURPOSE:To simplify the circuit, by supplying AC and DC bias currents to the bias winding of magnetic heads and connecting switching elements in parallel to signal windings and connecting these switching elements to a current source and inputting a digital signal to switching elements. CONSTITUTION:An AC power source Sa and a DC power source Sd are connected to a bias winding lB of magnetic heads MK, and AC and DC bias currents are flowed to this bias winding. Switching elements SWK are connected in parallel to signal windings lK, and they are connected to a current source S. An MOS FET or a bipolar TR is used to input the digital signal to elements SWK. The deflected residual magnetism which is generated on a tape by the unidirectional current source S adjusts the DC bias current and disappeas. Thus, the circuit is simplified, and the multichannel system is realized easily with a pair of power sources.
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公开(公告)号:JPS54161806A
公开(公告)日:1979-12-21
申请号:JP7110278
申请日:1978-06-13
Applicant: SONY CORP
Inventor: FUSE YUUZOU , SUGITA JIYUNKICHI
Abstract: PURPOSE:To ensure an assured prevention for the howling by installing two coils wound round cores each orthogonally and then flowing the high-frequency current to these coils intermittently and with a time shift to secure the radiation of the induction magnetic flux as well as to obtain the reception output. CONSTITUTION:For inductive transmitter 1, coil 3A wound round core 2A and coil 3B wound round core 2B are installed orthogonally to each other, and then the high-frequency current intermittent and with a time shift to each other is flown to the both coils to secure the radiation of the induction magnetic flux. While inductive receiver 11 features coil 13 wound round core 12. And when transmitter 1 comes close to receiver 11 in a certain range, the reception output is obtained regardless of the angular relation between the transmission and reception coils. As a result, the howling can be prevented in an assured way.
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公开(公告)号:JPS54159802A
公开(公告)日:1979-12-18
申请号:JP6921878
申请日:1978-06-08
Applicant: SONY CORP
Inventor: FUSE YUUZOU , SUGITA JIYUNKICHI
Abstract: PURPOSE:To obtain a non-directivity characteristic by flowing currents, which have a phase difference of 90 deg. mutually, to orthogonal transmission coils in the inductive transmitter for preventing howling. CONSTITUTION:Materials obtained by winding coils 3A and 3B around cores 2A and 2B respectively are arranged orthogonally, and high-frequency currents which have a phase difference of 90 deg. mutually are flowed to coils 3A and 3B.
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公开(公告)号:JPS54112625A
公开(公告)日:1979-09-03
申请号:JP2001878
申请日:1978-02-23
Applicant: SONY CORP
Inventor: FUSE YUUZOU , SUGITA JIYUNKICHI
IPC: H04R3/02
Abstract: PURPOSE:To perform power supply to a howling preventing device, etc. well by using the DC voltage generated through rectifying of the high frequency signal supplied superposedly to audio signal as a power source. CONSTITUTION:The audio signal from an amplifier 5 and the high frequency signal which does not interfere with the audio signal are superposedly supplied to a signal feeder 4. The high frequency signal of this superposed signal is separated by a series resonance circuit 18 parallel connected to the feeder 4 and only the audio signal is supplied to a speaker 1a. The high frequency signal is then rectified by the rectifier circuit formed by the parallel resonance circuit 17 formed with the capacitor 16 and the winding 12a of a transformer 12 serial to the feeder 4 and a diode 13 and capacitor 14 connecting to the winding 12b of the transformer 12. The DC voltage generated in this rectifier circuit end is applied to the howling preventing control circuit, etc. of the speaker 1a.
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公开(公告)号:JPS601615A
公开(公告)日:1985-01-07
申请号:JP10887183
申请日:1983-06-17
Applicant: SONY CORP
Inventor: ONO TETSUO , MINAMI TOSHIHIKO , KAJIYAMA YUUJI , HAYATA YUTAKA , SUGITA JIYUNKICHI , UCHIDA HIROYUKI , WAKABAYASHI NOBORU
Abstract: PURPOSE:To obtain with high yield a magnetic head which excels in the sealing effect by putting an integrated circuit and a multi-element magnetic head on a resin mold material which is previously formed with use of leads to bond them together and casting the resin into a space formed by butting the mold material to a casting mold and then hardening the resin. CONSTITUTION:Wall parts 35a-35c and a bank part 33 are provided to form an integrated circuit storing recess part 32 and a multi-element magnetic head setting part 34, and a resin casting cut part 36 is formed to the side wall 35b at one side of the part 32 to obtain a mold material 31. This material 31 is molded by burying a lead frame 21 which is previously produced with addition of a lead part 23 and an integrated circuit attaching part 22. Then a magnetic head 1, an integrated circuit 41 and a circuit parts 80 are set and bonded to the part 23. A casting mold 61 is butted to the material 31, and the resin is cast through the cut part 36 and hardened. Then each multi-element magnetic head device is removed, and a contact surface between the head 1 and a magnetic recording medium is formed. Thus it is possible to produce with high yield a multi-element magnetic head which excels in the sealing effect such as humidity resistance, etc. with no disconnection of the part 23.
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公开(公告)号:JPS59174029A
公开(公告)日:1984-10-02
申请号:JP4958483
申请日:1983-03-24
Applicant: Sony Corp
Inventor: YADA HIROAKI , SUGITA JIYUNKICHI
CPC classification number: H04B3/04
Abstract: PURPOSE:To simplify the circuit constitution of an equalizer and to perform the waveform equalizing processing with high quality by equalizing the waveform by the equalizer after suppressing the low band peak of a reproduced signal through a low band suppressing circuit. CONSTITUTION:A reproduce digital signal is applied to a low band suppressing circuit 23 for suppression of its low band peak. The output of the circuit 23 is applied to an equalizer 24 for equalization of waveform. The output of the equalizer 24 is applied to a digital data detecting/demodulating circuit 18 through a low band compensating circuit 25. The circuit 25 restores the low band component suppressed by the circuit 23 to obtain a correct equalized waveform which is free from the code interference and has the characteristics opposite to those of the circuit 23. Thus the dynamic range is reduced for the signals treated by the equalizer 24. This can simplify the circuit constitution of the equalizer and also perform the waveform equalizing processing with high quality.
Abstract translation: 目的:为了简化均衡器的电路结构,并且通过在通过低频带抑制电路抑制再现信号的低频带峰值之后通过均衡器对波形进行均衡来进行高质量的波形均衡处理。 构成:再现数字信号被施加到低频带抑制电路23以抑制其低频带峰值。 电路23的输出被施加到均衡器24以均衡波形。 均衡器24的输出通过低频带补偿电路25被施加到数字数据检测/解调电路18.电路25恢复由电路23抑制的低频带分量,以获得没有代码的正确的均衡波形 并且具有与电路23相反的特性。因此,由均衡器24处理的信号的动态范围减小。这可以简化均衡器的电路结构,并且还以高质量执行波形均衡处理。
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公开(公告)号:JPS59171243A
公开(公告)日:1984-09-27
申请号:JP4522683
申请日:1983-03-17
Applicant: Sony Corp
Inventor: SUGITA JIYUNKICHI , YADA HIROAKI
CPC classification number: G11B20/1426
Abstract: PURPOSE:To attain transmission of high rate to a transmission system having a band limit and decreased low-frequency spectrum by converting data of 8 bits into a code word 10 bits, applying NRZI modulation thereto and transmitting the result to make the bit synchronism at the reproducing side easy. CONSTITUTION:Input data of 8 bits is converted into a parallel signal at a shift register 1 and inputted to an ROM 2 storing the conversion rule of 8 bits into 10 bits, and a block signal of 10 bits thus obtained is converted into a serial signal at a shift register 3, modulated at an NRZI modulator 4 and transmitted to a transmission line. On the other hand, data from the transmission line is demodulated into an NRZ signal at an NRZ demodulator 5, demodulated into an NRZ signal, converted into a parallel signal of 10 bits at a shift register 6, inputted to an ROM7 storing the inverse conversion rule of 10 bits into 8 bits, the data of 8 bits thus obtained is converted into a serial signal at a shift register 8 and transmitted to a data processing system.
Abstract translation: 目的:为了通过将8位数据转换成码字10位来实现具有频带限制和降低的低频频谱的传输系统的高速传输,对其进行NRZI调制,并发送结果以使位同步在 再现方便。 构成:8位的输入数据在移位寄存器1被转换为并行信号,并输入到存储8位的转换规则的ROM2为10位,并将这样获得的10位的块信号转换为串行信号 在移位寄存器3处,在NRZI调制器4处被调制并传输到传输线。 另一方面,来自传输线的数据在NRZ解调器5被解调成NRZ信号,被解调成NRZ信号,在移位寄存器6被转换成10位的并行信号,输入到存储逆变换的ROM7 将10位的规则分解为8位,将由此获得的8位的数据在移位寄存器8转换成串行信号,并将其传送到数据处理系统。
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公开(公告)号:JPS59101017A
公开(公告)日:1984-06-11
申请号:JP21091582
申请日:1982-12-01
Applicant: Sony Corp
Inventor: SEKO SATORU , SUGITA JIYUNKICHI
IPC: G11B5/09
CPC classification number: G11B5/09
Abstract: PURPOSE:To perform pulse train recording which can be formed into an one- chip IC with a simple circuit configuration, by successively controlling plural switching circuits in accordance with serial data, in which data to be added to each head are successively arranged, and making an electric current of a direction corresponding to data flow successively to each head for a prescribed period. CONSTITUTION:Clocks phi1 and phi2 and a pulse width setting pulse Ps are added to each terminal 4, 5, and 6 and data D0 are added to a terminal 7. The data d0 are serial data, in which data to be successively recorded by heads 11-14 are successively arranged and synchronized to the clock phi1. The cycle of the clock phi2 represents the one cycle of the serial data D0 and is added in a rate of one piece to four pieces of the clock phi1. The pulse Ps is to determine the pulse width of a pulse current +I or -I to be made to flow to each head and synchronized to the clock phi1. It is possible to make to flow a pulse-like current +I or -I of positive or negative polarity shown by g-t of the diagram to each head 11-14 in accordance with the ''H'' and ''L'' of the data D0.
Abstract translation: 目的:采用简单的电路结构进行单芯片IC的脉冲串录制,通过连续地依次串行数据连续地控制多个开关电路,连续配置要附加到每个头的数据,并使 对应于数据的方向的电流依次流动到每个头部规定的时间段。 构成:将时钟phi1和phi2以及脉冲宽度设定脉冲Ps加到每个端子4,5和6上,数据D0被加到一个端子7.数据d0是串行数据,其中要由头部连续记录的数据 11-14连续地布置并与时钟phi1同步。 时钟phi2的周期表示串行数据D0的一个周期,并以一个到四个时钟phi1的速率相加。 脉冲Ps用于确定要流向每个磁头并与时钟phi1同步的脉冲电流+ I或-I的脉冲宽度。 可以使图11所示的脉冲状电流+ I或-I与图11-14所示的正极或负极按照“H”和“L” 数据D0。
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公开(公告)号:JPS54112624A
公开(公告)日:1979-09-03
申请号:JP2001778
申请日:1978-02-23
Applicant: SONY CORP
Inventor: FUSE YUUZOU , SUGITA JIYUNKICHI
IPC: H04R3/02
Abstract: PURPOSE:To perform good power supply to a howling preventing device, etc. by charging a battery with the DC current by the rectifier circuit connected to a speaker signal supply line near a speaker and using this as a power feed source. CONSTITUTION:DC current is generated by a rectifier circuit constituted by a diode 8 and capacitor 9 or other provided to the line connected near speaker 1a to the signal feeder 4 to the speaker 1a from an amplifier 5 even when the signal level is low, by which the battery 11 provided to the rectifier circuit end is charged. The DC voltage of this battery 11 enables power to be supplied well to a control unit 5, etc. of the howling preventing attenuator, etc. of the speaker 1a by a multiplicity of speakers without providing external DC power source and feeders.
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