公开(公告)号：EP0933644A1

公开(公告)日：1999-08-04

申请号：EP99300685.7

申请日：1999-01-29

Applicant: Stmicroelectronics, Ltd.

Inventor： Maccormack, Andrew

IPC: G01R31/3185 ,  G11C29/00

CPC classification number: G11C29/32 ,  G01R31/318536

Abstract: There is described circuitry for enabling scan testing of all connections to a device, having at least one output and a plurality of inputs greater than a number of outputs. Such a device typically includes built-in self-test capability.
An exclusive-OR (80) gate receives the plurality of inputs (64,66,68) and generates an exclusive-OR output (82). A multiplexer (18) receives the at least one data output (70) and the exclusive-OR output as respect inputs, and selectively outputs one of such as a data output (72). Such selection of the output of the multiplexer is controlled responsive to a scan test signal (32), the exclusive-OR output being output from the multiplexer in a scan test.

Abstract translation: 描述了用于对具有至少一个输出和大于多个输出的多个输入的对设备的所有连接进行扫描测试的电路。 这样的设备通常包括内置的自检能力。 异或（80）门接收多个输入（64,66,68）并产生异或输出（82）。 多路复用器（18）根据输入接收至少一个数据输出（70）和异或输出，并选择性地输出诸如数据输出（72）之一。 响应于扫描测试信号（32）控制多路复用器的输出的这种选择，异或输出在扫描测试中从多路复用器输出。