公开(公告)号：WO1996023256A1

公开(公告)日：1996-08-01

申请号：PCT/US1996000503

申请日：1996-01-16

Applicant: TANDEM COMPUTERS INCORPORATED

Inventor： TANDEM COMPUTERS INCORPORATED ,  MODIRI, Ramin ,  MURTHY, Srinivasa, D. ,  ROWE, Alan, L.

IPC: G06F09/46

CPC classification number: G06F11/2023 ,  G06F9/542 ,  G06F11/1443

Abstract: An apparatus and method, using an inter-processor lock to coordinate signal delivery to a process group (G1) whose member processes (P100, P110, P120) are distributed across multiple processors (2a, 2b, 2c). The apparatus and method insure that each process group memory process receives the same signals in the same order and that no signal is duplicated. The apparatus and method also insure that a partially completed signal delivery is completed even in the face of failure of the signalling processor.

Abstract translation: 一种装置和方法，使用处理器间锁来协调向成员处理（P100，P110，P120）分布在多个处理器（2a，2b，2c）上的处理组（G1）的信号传递。 该装置和方法确保每个处理组存储器处理以相同的顺序接收相同的信号，并且没有信号被重复。 该装置和方法还确保即使面对信令处理器的故障也完成部分完成的信号传递。

公开(公告)号：EP0806006A1

公开(公告)日：1997-11-12

申请号：EP96902677.0

申请日：1996-01-16

Applicant: TANDEM COMPUTERS INCORPORATED

Inventor： MODIRI, Ramin ,  MURTHY, Srinivasa, D. ,  ROWE, Alan, L.

IPC: G06F11 ,  G06F9

CPC classification number: G06F11/2023 ,  G06F9/542 ,  G06F11/1443

Abstract: An apparatus and method, using an inter-processor lock to coordinate signal delivery to a process group (G1) whose member processes (P100, P110, P120) are distributed across multiple processors (2a, 2b, 2c). The apparatus and method insure that each process group memory process receives the same signals in the same order and that no signal is duplicated. The apparatus and method also insure that a partially completed signal delivery is completed even in the face of failure of the signalling processor.