1.
    发明专利
    未知

    公开(公告)号:DE69630272T2

    公开(公告)日:2004-09-16

    申请号:DE69630272

    申请日:1996-12-02

    Abstract: A digital display device interface for a host system (12) and its display device (14) and peripherals. The interface has separate logical and physical levels, thereby making the interface independent of any hardware configuration or connector. The initialization logic level allows dynamic configuration of the system upon power up or initialization. The display data level (30) controls the video data sent for display in a continuous, full bandwidth data stream. The I/O data level (32) controls communications between peripheral devices (18a...18x) connected to the display device (14) and the system (12).

    2.
    发明专利
    未知

    公开(公告)号:DE69630272D1

    公开(公告)日:2003-11-13

    申请号:DE69630272

    申请日:1996-12-02

    Abstract: A digital display device interface for a host system (12) and its display device (14) and peripherals. The interface has separate logical and physical levels, thereby making the interface independent of any hardware configuration or connector. The initialization logic level allows dynamic configuration of the system upon power up or initialization. The display data level (30) controls the video data sent for display in a continuous, full bandwidth data stream. The I/O data level (32) controls communications between peripheral devices (18a...18x) connected to the display device (14) and the system (12).

    UNIVERSAL DIGITAL DISPLAY INTERFACE

    公开(公告)号:CA2191504C

    公开(公告)日:2003-06-03

    申请号:CA2191504

    申请日:1996-11-28

    Abstract: A digital display device interface for a host system and its display devi ce and peripherals. The interface has separate logical and physical levels, thereby making the interface independent of any hardware configuration or connector. The initialization logic level allows dynamic configuration of the system up on power up or initialization. The display data level controls the video data sent for display in a continuous, full bandwidth data stream. The I/O data level controls communications between peripheral devices connected to the display device an d the system.

    UNIVERSAL DIGITAL DISPLAY INTERFACE

    公开(公告)号:CA2191504A1

    公开(公告)日:1997-06-02

    申请号:CA2191504

    申请日:1996-11-28

    Abstract: A digital display device interface for a host system and its display devi ce and peripherals. The interface has separate logical and physical levels, thereby making the interface independent of any hardware configuration or connector. The initialization logic level allows dynamic configuration of the system up on power up or initialization. The display data level controls the video data sent for display in a continuous, full bandwidth data stream. The I/O data level controls communications between peripheral devices connected to the display device an d the system.

    GENERAL PURPOSE DIGITAL DISPLAY DEVICE INTERFACE

    公开(公告)号:JPH09311670A

    公开(公告)日:1997-12-02

    申请号:JP32040096

    申请日:1996-11-29

    Abstract: PROBLEM TO BE SOLVED: To provide a display device interface in which both of an analog format and a digital format are supported and unnecessary conversion between these two formats is dispensed with. SOLUTION: The display device interface for a host system 12, its display device 14, and its peripheral devices, have respective logical levels and a physical levels which are independent of each other, perform interface independent of hardware constitution or of a connector, on the basis of these levels, and carry out dynamic configuration of a system on the basis of an initialization logical level when an electric power source is turned on or when initialization is carried out. The display data level is controlled so that video data can be sent for display in the form of a continuous overall band width data stream, while an I/O data level controls communication between peripheral devices (18a,..., 18x) connected to the display device 14 and the host system 12.

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