公开(公告)号：US20220077030A1

公开(公告)日：2022-03-10

申请号：US17528087

申请日：2021-11-16

Applicant: Texas Instruments Incorporated

Inventor： Sreenivasan K. Koduri ,  Abram M. Castro

IPC: H01L23/495 ,  H01L23/50

Abstract: In some examples, a device comprises an electronic component having multiple electrical connectors, the multiple electrical connectors configured to couple to a printed circuit board (PCB) and having a first footprint. The device also comprises a multi-lead adapter comprising multiple rows of leads arranged in parallel, the leads in the rows configured to couple to the electrical connectors of the electronic component and having a second footprint that has a different size than the first footprint.

公开(公告)号：US11088052B2

公开(公告)日：2021-08-10

申请号：US16031695

申请日：2018-07-10

Applicant: TEXAS INSTRUMENTS INCORPORATED

Inventor： Abram M. Castro

IPC: H01L21/48 ,  H01L23/31 ,  H01L23/495 ,  H01L21/56 ,  H01L23/00

Abstract: A surface mount electronic device providing an electrical connection between an integrated circuit (IC) and a printed circuit board (PCB) is provided and includes a die and a dielectric material formed to cover portions of the die. Pillar contacts are electrically coupled to electronic components in the die and the pillar contacts extend from the die beyond an outer surface of the die. A conductive ink is printed on portions of a contact surface of the electronic device package and forms electrical terminations on portions of the dielectric material and electrical connector elements that connect an exposed end surface of the pillar contacts to the electrical terminations.

公开(公告)号：US20210366811A1

公开(公告)日：2021-11-25

申请号：US17399010

申请日：2021-08-10

Applicant: Texas Instruments Incorporated

Inventor： Abram M. Castro

IPC: H01L23/495 ,  H01L23/31 ,  H01L21/56 ,  H01L23/00 ,  H01L21/48

Abstract: A surface mount electronic device providing an electrical connection between an integrated circuit (IC) and a printed circuit board (PCB) is provided and includes a die and a dielectric material formed to cover portions of the die. Pillar contacts are electrically coupled to electronic components in the die and the pillar contacts extend from the die beyond an outer surface of the die. A conductive ink is printed on portions of a contact surface of the electronic device package and forms electrical terminations on portions of the dielectric material and electrical connector elements that connect an exposed end surface of the pillar contacts to the electrical terminations.

公开(公告)号：US20210028093A1

公开(公告)日：2021-01-28

申请号：US17069655

申请日：2020-10-13

Applicant: Texas Instruments Incorporated

Inventor： Abram M. Castro ,  Steven Kummerl

IPC: H01L23/495 ,  H01L25/16 ,  H01L23/28

Abstract: An integrated circuit (IC) chip can include a die with an interconnect conductively coupled to a leadframe, wherein the leadframe forms a portion of a given surface of the IC chip. The IC chip can also include an encapsulating material molded over the die and the leadframe. The encapsulating material can form another surface of the IC chip. The other surface of the IC chip opposes the given surface of the IC chip. The IC chip can further include a vertical wire extending through the encapsulating material in a direction that is substantially perpendicular to the given surface of the IC chip and the vertical wire protruding through the other surface of the IC chip to form a vertical connector for the IC chip. The vertical connector can be coupled to the interconnect on the die.

公开(公告)号：US20170194233A1

公开(公告)日：2017-07-06

申请号：US14985947

申请日：2015-12-31

Applicant: TEXAS INSTRUMENTS INCORPORATED

Inventor： Abram M. Castro ,  Steven Kummerl

IPC: H01L23/495 ,  H01L23/28

Abstract: An integrated circuit (IC) chip can include a die with an interconnect conductively coupled to a leadframe, wherein the leadframe forms a portion of a given surface of the IC chip. The IC chip can also include an encapsulating material molded over the die and the leadframe. The encapsulating material can form another surface of the IC chip. The other surface of the IC chip opposes the given surface of the IC chip. The IC chip can further include a vertical wire extending through the encapsulating material in a direction that is substantially perpendicular to the given surface of the IC chip and the vertical wire protruding through the other surface of the IC chip to form a vertical connector for the IC chip. The vertical connector can be coupled to the interconnect on the die.

公开(公告)号：US11854947B2

公开(公告)日：2023-12-26

申请号：US17069655

申请日：2020-10-13

Applicant: Texas Instruments Incorporated

Inventor： Abram M. Castro ,  Steven Kummerl

IPC: H01L23/495 ,  H01L25/16 ,  H01L23/28 ,  H01L23/31

CPC classification number: H01L23/4952 ,  H01L23/28 ,  H01L23/49524 ,  H01L23/49568 ,  H01L23/49575 ,  H01L25/16 ,  H01L23/3107 ,  H01L23/49513 ,  H01L2224/16245 ,  H01L2224/18 ,  H01L2224/32245 ,  H01L2224/48091 ,  H01L2224/48247 ,  H01L2224/73265 ,  H01L2924/19107 ,  H01L2224/48091 ,  H01L2924/00014 ,  H01L2224/73265 ,  H01L2224/32245 ,  H01L2224/48247 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2224/73265 ,  H01L2224/32245 ,  H01L2224/48247

Abstract: An integrated circuit (IC) chip can include a die with an interconnect conductively coupled to a leadframe, wherein the leadframe forms a portion of a given surface of the IC chip. The IC chip can also include an encapsulating material molded over the die and the leadframe. The encapsulating material can form another surface of the IC chip. The other surface of the IC chip opposes the given surface of the IC chip. The IC chip can further include a vertical wire extending through the encapsulating material in a direction that is substantially perpendicular to the given surface of the IC chip and the vertical wire protruding through the other surface of the IC chip to form a vertical connector for the IC chip. The vertical connector can be coupled to the interconnect on the die.

公开(公告)号：US11830793B2

公开(公告)日：2023-11-28

申请号：US17528087

申请日：2021-11-16

Applicant: Texas Instruments Incorporated

Inventor： Sreenivasan K. Koduri ,  Abram M. Castro

IPC: H01L23/495 ,  H01L23/50

CPC classification number: H01L23/49541 ,  H01L23/50 ,  H01L2224/48247

Abstract: In some examples, a device comprises an electronic component having multiple electrical connectors, the multiple electrical connectors configured to couple to a printed circuit board (PCB) and having a first footprint. The device also comprises a multi-lead adapter comprising multiple rows of leads arranged in parallel, the leads in the rows configured to couple to the electrical connectors of the electronic component and having a second footprint that has a different size than the first footprint.

公开(公告)号：US10804185B2

公开(公告)日：2020-10-13

申请号：US14985947

申请日：2015-12-31

Applicant: TEXAS INSTRUMENTS INCORPORATED

Inventor： Abram M. Castro ,  Steven Kummerl

IPC: H01L23/495 ,  H01L23/02 ,  H01L23/48 ,  H01L23/52 ,  H01L25/16 ,  H01L23/28 ,  H01L23/31

Abstract: An integrated circuit (IC) chip can include a die with an interconnect conductively coupled to a leadframe, wherein the leadframe forms a portion of a given surface of the IC chip. The IC chip can also include an encapsulating material molded over the die and the leadframe. The encapsulating material can form another surface of the IC chip. The other surface of the IC chip opposes the given surface of the IC chip. The IC chip can further include a vertical wire extending through the encapsulating material in a direction that is substantially perpendicular to the given surface of the IC chip and the vertical wire protruding through the other surface of the IC chip to form a vertical connector for the IC chip. The vertical connector can be coupled to the interconnect on the die.

公开(公告)号：US20150371963A1

公开(公告)日：2015-12-24

申请号：US14838729

申请日：2015-08-28

Applicant: Texas Instruments Incorporated

Inventor： Abram M. Castro ,  Mark A. Gerber

IPC: H01L23/00

CPC classification number: H01L24/13 ,  H01L23/49811 ,  H01L24/06 ,  H01L24/14 ,  H01L24/16 ,  H01L2224/0401 ,  H01L2224/05147 ,  H01L2224/0558 ,  H01L2224/05638 ,  H01L2224/05655 ,  H01L2224/13005 ,  H01L2224/13012 ,  H01L2224/13147 ,  H01L2224/16238 ,  H01L2924/00013 ,  H01L2924/01013 ,  H01L2924/01014 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01046 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/14 ,  H01L2924/00014 ,  H01L2224/13099

Abstract: A semiconductor device has semiconductor chip assembled on a substrate. The substrate has a first surface including conductive traces, which have a first length and a first width, the first width being uniform along the first length, and further a pitch to respective adjacent traces. The semiconductor chip has a second surface including contact pads; the second surface faces the first surface spaced apart by a gap. A conductive pillar contacts each contact pad; the pillar includes a core and a solder body, which connects the core to the respective trace across the gap. The pillar core has a non-circular cross section of a second width and a second length greater than the second width and greater than the first width.

Abstract translation: 半导体器件具有组装在衬底上的半导体芯片。 衬底具有包括具有第一长度和第一宽度的导电迹线的第一表面，第一宽度沿着第一长度是均匀的，并且还具有到各个相邻迹线的间距。 半导体芯片具有包括接触焊盘的第二表面; 第二表面面对间隔开的间隙的第一表面。 导电柱接触每个接触垫; 支柱包括芯和焊体，其将芯连接到穿过间隙的相应迹线。 柱芯具有第二宽度的非圆形横截面和大于第二宽度的第二长度，并且大于第一宽度。

公开(公告)号：US11552005B2

公开(公告)日：2023-01-10

申请号：US17399010

申请日：2021-08-10

Applicant: Texas Instruments Incorporated

Inventor： Abram M. Castro

IPC: H01L21/48 ,  H01L21/56 ,  H01L23/495 ,  H01L23/31 ,  H01L23/00

Abstract: A surface mount electronic device providing an electrical connection between an integrated circuit (IC) and a printed circuit board (PCB) is provided and includes a die and a dielectric material formed to cover portions of the die. Pillar contacts are electrically coupled to electronic components in the die and the pillar contacts extend from the die beyond an outer surface of the die. A conductive ink is printed on portions of a contact surface of the electronic device package and forms electrical terminations on portions of the dielectric material and electrical connector elements that connect an exposed end surface of the pillar contacts to the electrical terminations.