公开(公告)号：US11021786B2

公开(公告)日：2021-06-01

申请号：US16209513

申请日：2018-12-04

Applicant: Texas Instruments Incorporated

Inventor： Luu Thanh Nguyen ,  Mahmud Halim Chowdhury ,  Ashok Prabhu ,  Anindya Poddar

IPC: H01L21/3205 ,  C23C14/12 ,  C23F11/10 ,  H01L21/288 ,  H01L21/768

Abstract: In a described example, a method for passivating a copper structure includes: passivating a surface of the copper structure with a copper corrosion inhibitor layer; and depositing a protection overcoat layer with a thickness less than 35 μm on a surface of the copper corrosion inhibitor layer.

公开(公告)号：US10763230B2

公开(公告)日：2020-09-01

申请号：US16228962

申请日：2018-12-21

Applicant: TEXAS INSTRUMENTS INCORPORATED

Inventor： Hiroyuki Sada ,  Shoichi Iriguchi ,  Genki Yano ,  Luu Thanh Nguyen ,  Ashok Prabhu ,  Anindya Poddar ,  Yi Yan ,  Hau Nguyen

IPC: H01L21/78 ,  H01L21/683 ,  H01L23/00 ,  H01L23/495

Abstract: A method for backside metallization includes inkjet printing a pattern of nanosilver conductive ink on a first surface of a silicon wafer. The silicon wafer includes a plurality of dies. The pattern includes a clearance area along a scribe line between the dies. A laser is focused, through a second surface of the wafer, at a point between the first surface of the silicon wafer and the second surface of the silicon wafer. The second surface is opposite the first surface. The dies are separated along the scribe line.

公开(公告)号：US20240055331A1

公开(公告)日：2024-02-15

申请号：US17887790

申请日：2022-08-15

Applicant: Texas Instruments Incorporated

Inventor： Hau Nguyen ,  Ashok Prabhu ,  Kurt Sincerbox

IPC: H01L23/495 ,  H01L23/00 ,  H01L23/31 ,  H01L21/48 ,  H01L21/56

CPC classification number: H01L23/49568 ,  H01L24/73 ,  H01L24/48 ,  H01L24/32 ,  H01L23/49513 ,  H01L23/49565 ,  H01L23/49562 ,  H01L23/3135 ,  H01L21/4842 ,  H01L21/565 ,  H01L21/561 ,  H01L2924/182 ,  H01L2224/73265 ,  H01L2224/48464 ,  H01L2224/48245 ,  H01L2224/32245

Abstract: An electronic device includes a die attach pad, a semiconductor die, a lead, a package structure, and tie bars, where the die attach pad has opposite first and second sides, the semiconductor die is attached to the second side of the die attach pad, the lead has a first portion connected to a circuit of the semiconductor die by a bond wire, the package structure exposes a portion of the first side of the die attach pad and the second portion of the lead. Four tie bars extend outward from the die attach pad and the tie bars have respective ends exposed outside the package structure.

公开(公告)号：US11410875B2

公开(公告)日：2022-08-09

申请号：US16225875

申请日：2018-12-19

Applicant: TEXAS INSTRUMENTS INCORPORATED

Inventor： Hau Thanh Nguyen ,  Woochan Kim ,  Yi Yan ,  Luu Thanh Nguyen ,  Ashok Prabhu ,  Anindya Poddar ,  Masamitsu Matsuura ,  Kengo Aoya ,  Mutsumi Masumoto

IPC: H01L21/768 ,  H01L23/528 ,  H01L23/31 ,  H01L23/00

Abstract: An electronic device (100) includes a substrate (110) and an integrated circuit (120) provided on the substrate (110) having a surface facing away from the substrate (110). An insulating layer (150) extends over the substrate (110) and around the integrated circuit (120) to define an interface (154) between the insulating layer (150) and the integrated circuit (120). An electrically conductive via (130) is provided on the surface of the integrated circuit (120). An insulating material (140) extends over the via (130) and includes an opening (142) exposing a portion of the via (130). A repassivation member (162) extends over the insulating layer (150) and has a surface (164) aligned with the interface (154). An electrically conductive redistribution member (181) is electrically connected to the via (130) and extends over the repassivation member (162) into contact with the insulating layer (150).

公开(公告)号：US20200173013A1

公开(公告)日：2020-06-04

申请号：US16209513

申请日：2018-12-04

Applicant: Texas Instruments Incorporated

Inventor： Luu Thanh Nguyen ,  Mahmud Halim Chowdhury ,  Ashok Prabhu ,  Anindya Poddar

IPC: C23C14/12 ,  C23F11/10 ,  H01L21/768 ,  H01L21/3205 ,  H01L21/288

Abstract: In a described example, a method for passivating a copper structure includes: passivating a surface of the copper structure with a copper corrosion inhibitor layer; and depositing a protection overcoat layer with a thickness less than 35 μm on a surface of the copper corrosion inhibitor layer.

公开(公告)号：US20200035633A1

公开(公告)日：2020-01-30

申请号：US16047888

申请日：2018-07-27

Applicant: Texas Instruments Incorporated

Inventor： Dibyajat Mishra ,  Ashok Prabhu ,  Tomoko Noguchi ,  Luu Thanh Nguyen ,  Anindya Poddar ,  Makoto Yoshino ,  Hau Nguyen

IPC: H01L23/00 ,  H01L23/31 ,  H01L23/495

Abstract: A microelectronic device has a pillar connected to an external terminal by an intermetallic joint. Either the pillar or the external terminal, or both, include copper in direct contact with the intermetallic joint. The intermetallic joint includes at least 90 weight percent of at least one copper-tin intermetallic compound. The intermetallic joint is free of voids having a combined volume greater than 10 percent of a volume of the intermetallic joint; and free of a void having a volume greater than 5 percent of the volume of the intermetallic joint. The microelectronic device may be formed using solder which includes at least 93 weight percent tin, 0.5 weight percent to 5.0 weight percent silver, and 0.4 weight percent to 1.0 weight percent copper, to form a solder joint between the pillar and the external terminal, followed by thermal aging to convert the solder joint to the intermetallic joint.

公开(公告)号：US20250140653A1

公开(公告)日：2025-05-01

申请号：US18494027

申请日：2023-10-25

Applicant: Texas Instruments Incorporated

Inventor： Anindya Poddar ,  Ashok Prabhu ,  Hau Nguyen ,  Kurt Sincerbox ,  Makoto Shibuya

IPC: H01L23/495 ,  H01L21/48 ,  H01L21/56 ,  H01L23/00 ,  H01L23/31

Abstract: An electronic device includes opposite first and second sides, opposite third and fourth sides spaced apart along a first direction, and opposite fifth and sixth sides spaced apart along a second direction orthogonal to the first direction, the first and second sides being spaced apart along a third direction orthogonal to the first and second directions. The electronic device includes a molded package, first leads exposed outside the molded package along the first side, and the first leads extending outward from the molded package along a respective one of the third and fourth sides, and second leads exposed outside the molded package along the first side, the second leads having a lateral side exposed outside the molded package along a respective one of the fifth and sixth sides, and the lateral side of the individual second leads being flush with a respective side of the molded package.

公开(公告)号：US11450638B2

公开(公告)日：2022-09-20

申请号：US17009648

申请日：2020-09-01

Applicant: Texas Instruments Incorporated

Inventor： Dibyajat Mishra ,  Ashok Prabhu ,  Tomoko Noguchi ,  Luu Thanh Nguyen ,  Anindya Poddar ,  Makoto Yoshino ,  Hau Nguyen

IPC: H01L23/00 ,  H01L23/495 ,  H01L23/31

Abstract: A microelectronic device has a pillar connected to an external terminal by an intermetallic joint. Either the pillar or the external terminal, or both, include copper in direct contact with the intermetallic joint. The intermetallic joint includes at least 90 weight percent of at least one copper-tin intermetallic compound. The intermetallic joint is free of voids having a combined volume greater than 10 percent of a volume of the intermetallic joint; and free of a void having a volume greater than 5 percent of the volume of the intermetallic joint. The microelectronic device may be formed using solder which includes at least 93 weight percent tin, 0.5 weight percent to 5.0 weight percent silver, and 0.4 weight percent to 1.0 weight percent copper, to form a solder joint between the pillar and the external terminal, followed by thermal aging to convert the solder joint to the intermetallic joint.

公开(公告)号：US10763231B2

公开(公告)日：2020-09-01

申请号：US16047888

申请日：2018-07-27

Applicant: Texas Instruments Incorporated

Inventor： Dibyajat Mishra ,  Ashok Prabhu ,  Tomoko Noguchi ,  Luu Thanh Nguyen ,  Anindya Poddar ,  Makoto Yoshino ,  Hau Nguyen

IPC: H01L23/00 ,  H01L23/31 ,  H01L23/495

Abstract: A microelectronic device has a pillar connected to an external terminal by an intermetallic joint. Either the pillar or the external terminal, or both, include copper in direct contact with the intermetallic joint. The intermetallic joint includes at least 90 weight percent of at least one copper-tin intermetallic compound. The intermetallic joint is free of voids having a combined volume greater than 10 percent of a volume of the intermetallic joint; and free of a void having a volume greater than 5 percent of the volume of the intermetallic joint. The microelectronic device may be formed using solder which includes at least 93 weight percent tin, 0.5 weight percent to 5.0 weight percent silver, and 0.4 weight percent to 1.0 weight percent copper, to form a solder joint between the pillar and the external terminal, followed by thermal aging to convert the solder joint to the intermetallic joint.

公开(公告)号：US10650957B1

公开(公告)日：2020-05-12

申请号：US16176630

申请日：2018-10-31

Applicant: Texas Instruments Incorporated

Inventor： Yi Yan ,  Luu Thanh Nguyen ,  Ashok Prabhu ,  Anindya Poddar

IPC: H01F27/26 ,  H01F27/40 ,  H01L23/495 ,  H01L23/00 ,  H01F27/28 ,  H01F41/24 ,  H01L23/66 ,  H01L23/31

Abstract: Apparatus to form a transformer, an inductor, a capacitor or other passive electronic component, with patterned conductive features in a lamination structure, and one or more ferrite sheets or other magnetic core structures attached to the lamination structure via one or more inkjet printed magnetic adhesive layers that join the magnetic core structure or structures to the lamination structure.