公开(公告)号：AT539509T

公开(公告)日：2012-01-15

申请号：AT02700758

申请日：2002-02-25

Applicant: TOA CORP

Inventor： SHIBUYA TAKAKO ,  TANAKA TOMOHISA

IPC: H04L1/00 ,  G06F11/10 ,  H04B1/04

Abstract: A transmitter (1) converts an input signal from a microphone (2) into a plural-bit digital signal by means of an A/D converter (4) at predetermined time intervals. An encoder (6) divides the digital signal into plural blocks and adds a parity bit to each block to thereby form a coded signal. A transmitting unit (8) modulates a carrier with the coded signal and transmits the modulated carrier through an antenna (10). A receiver (12) includes two tuning units (18A, 18B). Corresponding coded signals outputted from the tuning units (18A, 18B) are inputted to a decoder (20). The decoder (20) makes a parity check on respective blocks of the corresponding coded signals and selects and outputs an error-free one of the corresponding blocks of the corresponding coded signals.

公开(公告)号：DE60226991D1

公开(公告)日：2008-07-17

申请号：DE60226991

申请日：2002-10-08

Applicant: TOA CORP

Inventor： SHIBUYA TAKAKO ,  TANAKA TOMOHISA

IPC: H04L1/00 ,  G10L21/02

Abstract: Digital audio data with error detection bits added thereto is inputted to an error detecting and correcting device (4). The correcting device (4) corrects an error when the error is detected in the digital audio data. The digital audio data outputted from the error detecting and correcting device (4) is inputted to an impulse noise suppressing circuit (6). The suppressing circuit (6) operates for a predetermined time period when the correcting device (4) detects an error.

公开(公告)号：AT397813T

公开(公告)日：2008-06-15

申请号：AT02800788

申请日：2002-10-08

Applicant: TOA CORP

Inventor： SHIBUYA TAKAKO ,  TANAKA TOMOHISA

IPC: H04L1/00 ,  G10L21/02

Abstract: Digital audio data with error detection bits added thereto is inputted to an error detecting and correcting device (4). The correcting device (4) corrects an error when the error is detected in the digital audio data. The digital audio data outputted from the error detecting and correcting device (4) is inputted to an impulse noise suppressing circuit (6). The suppressing circuit (6) operates for a predetermined time period when the correcting device (4) detects an error.

公开(公告)号：EP1441460A4

公开(公告)日：2007-05-02

申请号：EP02800788

申请日：2002-10-08

Applicant: TOA CORP

Inventor： SHIBUYA TAKAKO ,  TANAKA TOMOHISA

IPC: G10L21/02 ,  H04L1/00

CPC classification number: G10L21/0208 ,  H04L1/004

Abstract: Digital audio data with error detection bits added thereto is input into an error detection and correction unit 4. The correction unit 4 corrects an error when the error is detected in the digital audio data. The digital audio data output from the error detection and correction unit 4 is input into an impulse noise suppression circuit 6. The suppression circuit 6 is operated for a predetermined time when the error detection and correction unit 4 has detected an error.

公开(公告)号：EP1388965A4

公开(公告)日：2009-11-18

申请号：EP02700758

申请日：2002-02-25

Applicant: TOA CORP

Inventor： SHIBUYA TAKAKO ,  TANAKA TOMOHISA

IPC: H04L1/00 ,  G06F11/10 ,  H04B1/04

CPC classification number: H04L1/007 ,  H04L1/0001 ,  H04L1/0045 ,  H04L1/06 ,  H04L1/20

公开(公告)号：JP2004120193A

公开(公告)日：2004-04-15

申请号：JP2002279139

申请日：2002-09-25

Applicant: Sanei Haitekkusu Kk ,  Toa Corp ,  ティーオーエー株式会社 ,  三栄ハイテックス株式会社

Inventor： UCHIZA HIROFUMI ,  SUZUKI ISATO ,  SHIBUYA TAKAKO ,  TANAKA TOMOHISA

IPC: H04B14/02

Abstract: PROBLEM TO BE SOLVED: To provide a digital receiver reducing phase distortion of an analog signal produced by converting a digital audio data sequence transmitted on a radio transmission line.
SOLUTION: Time series digital audio signals demodulated from transmission signals are written sequentially in a first-in first-out register 36 in synchronism with their generation timing. The time series digital audio signals are read out sequentially from the register 36 in synchronism with the timing of a read signal from a numeric control oscillator 40. The numeric control oscillator 40 is controlled by a control section 42 to read out the time series digital audio signals at a quick timing if the number of writing stages of the time series digital audio signals in the shift register 36 is larger than a specified value otherwise read out the time series digital audio signals at a slow timing. The read out timing is selected such that the variation thereof becomes smaller than the variation in generation timing. The time series digital audio signals read out from the register 36 are interpolated at an interpolating section 44 to correspond with the conversion timing at a digital/analog converter 30.
COPYRIGHT: (C)2004,JPO

公开(公告)号：JP2003198517A

公开(公告)日：2003-07-11

申请号：JP2001401524

申请日：2001-12-28

Applicant: TOA CORP

Inventor： TANAKA TOMOHISA ,  EJIMA KENICHI ,  SHIBUYA TAKAKO ,  KEIJO NOBUYUKI

IPC: H04L7/00

Abstract: PROBLEM TO BE SOLVED: To remove distortion depending on jitter or the responsiveness of PLL on a radio transmission line. SOLUTION: On the basis of a digital modulated signal and a first reference signal from a first reference signal source 64, a signal processing part 62 reproduces a transmission clock signal and reproduces digital audio data on the basis of this reproduced transmission clock signal. Synchronously with the reproduced transmission clock signal, the digital audio data are inputted to a sampling rate converter 66. Synchronously with a second reference signal from a second reference signal source 70, the digital audio data are outputted from the sampling rate converter 66 and the outputted digital audio data are converted into analog signals by a digital/analog converter 72. The first and second reference signal sources 64 and 70 mutually independently output the first and second reference signals. COPYRIGHT: (C)2003,JPO

公开(公告)号：JP2008054334A

公开(公告)日：2008-03-06

申请号：JP2007243668

申请日：2007-09-20

Applicant: Sanei Haitekkusu Kk ,  Toa Corp ,  ティーオーエー株式会社 ,  三栄ハイテックス株式会社

Inventor： UCHIZA HIROFUMI ,  SUZUKI ISATO ,  SHIBUYA TAKAKO ,  TANAKA TOMOHISA

IPC: H04L7/00 ,  H04B14/02

Abstract: PROBLEM TO BE SOLVED: To suppress generation of phase distortion in conversion into an analog signal by reducing influences of jitter received by a transmission signal transmitted on a transmission line. SOLUTION: A high frequency unit 22 demodulates a transmission signal resulting from modulating a carrier wave using a digitized waveform signal stream transmitted from a transmission source. A position determination unit 50 determines a position of another digitized waveform signal in demodulated digitized waveform signals, in a reference timing represented by a reference timing signal having a frequency of multiples of an input timing signal specifying a timing of inputting to a processing unit 24 for one digitized waveform signal in the demodulated digitized waveform signal stream. Based on a value of the other digitized waveform signal and the position of the other digitized waveform signal determined by the position determination unit 50, an interpolation unit 44 calculates an interpolated digitized waveform signal in the timing of inputting to the processing unit 24 for the one digitized waveform signal and supplies the calculated signal to the processing unit 24. COPYRIGHT: (C)2008,JPO&INPIT

Abstract translation: 要解决的问题：通过减少由传输线路上传输的传输信号接收的抖动的影响，抑制转换成模拟信号的相位失真的产生。 解决方案：高频单元22使用从发送源发送的数字化波形信号流来解调由调制载波产生的发送信号。 位置确定单元50以解调的数字化波形信号中的另一数字化波形信号的位置，在由具有指定输入定时信号的倍数的频率的参考定时信号表示的参考定时中，确定处理单元24的输入定时信号 解调后的数字化波形信号流中的一个数字化波形信号。 基于其他数字化波形信号的值和由位置确定单元50确定的另一数字化波形信号的位置，内插单元44在输入到处理单元24的定时的计时中计算内插数字化波形信号 数字化波形信号，并将计算出的信号提供给处理单元24.版权所有（C）2008，JPO＆INPIT

公开(公告)号：JP2004173183A

公开(公告)日：2004-06-17

申请号：JP2002339445

申请日：2002-11-22

Applicant: Toa Corp ,  ティーオーエー株式会社

Inventor： SHIBUYA TAKAKO ,  TANAKA TOMOHISA ,  UCHIZA HIROFUMI ,  SUZUKI ISATO

IPC: H03H17/00

Abstract: PROBLEM TO BE SOLVED: To provide a Lagrange interpolation sampling rate transformation device capable of reducing the amount of the data to be stored in a memory and performing the interpolation highly precisely even if the input sampling frequency fluctuates.
SOLUTION: Sampling digital data and a sampling timing signal representing occurrence timing of the data are sequentially inputted to this Lagrange interpolation sampling rate transformation device 2. The device 2 calculates the interpolation sampling digital data y at interpolation timing x by the operation of (requirement 1) on the basis of y(0) to y(n) being n + 1 pieces of sampling digital data and x(i), x(j) and x being the timing of the y(0) to y(n). The x, x(i), x(j) and y(i) are determined by a timing designation signal having a frequency of a value that is a plurality of times as large as the sampling timing signal.
COPYRIGHT: (C)2004,JPO

公开(公告)号：JP2000216757A

公开(公告)日：2000-08-04

申请号：JP1419499

申请日：1999-01-22

Applicant: TOA CORP

Inventor： SHIBUYA TAKAKO ,  TANAKA TOMOHISA

IPC: H04L1/00

Abstract: PROBLEM TO BE SOLVED: To output voice with quality which is in matching with needs even under a reception environment, where a disturbing wave exists. SOLUTION: An RF reception section 1 outputs an RSSI signal denoting strength of a received signal, a unique word detection section 3 outputs a UW signal representing synchronization/asynchronization of a digital signal, and an error correction section 4 outputs a bit B signal every time receiving a bit and outputs a BE signal denoting an erroneous bit, every time the error bit is detected. Counters 62, 63 count the number of B and BE signals on the basis of a time T set by a measurement time setting circuit 61, a divider circuit 64 divides the counts to obtain a BER signal representing error rate. A discrimination circuit 69 controls a muting circuit 5 in a way such that no muting is conducted, when a level of the RSSI signal is a reference level RFRSSI or over, the UW signal denotes synchronization and the BER signal is lower than a reference level RFBER. A user can variably set the reference level RFBER and the time T, and then a voice with quality which is in matching with the needs can be outputted.