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公开(公告)号:JP2000114538A
公开(公告)日:2000-04-21
申请号:JP28784298
申请日:1998-10-09
Applicant: TOSHIBA CORP
Inventor: UEMOTO TSUTOMU
IPC: H01L29/786 , G02F1/136 , G02F1/1368 , H01L21/336
Abstract: PROBLEM TO BE SOLVED: To provide a method for manufacturing a thin-film transistor wherein an impurity is evenly implanted over the entire surface of a silicon layer and no streak/spot arises on the image outputted through a liquid-crystal display device. SOLUTION: In a manufacturing process for a thin-film transistor, an amorphous silicon layer 3 is formed on a glass substrate 1 through an SiN layer 2. The amorphous silicon layer 3 is irradiated with a line beam extending in the direction (b) across a moving direction (a) of the glass substrate 1 through a line-beam type ton doping device 4. Here, the line beam is oscillated in the direction (b) across the scan direction (a) of the beam.
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公开(公告)号:JPH10341020A
公开(公告)日:1998-12-22
申请号:JP15121297
申请日:1997-06-09
Applicant: TOSHIBA CORP
Inventor: UEMOTO TSUTOMU
IPC: G02F1/136 , G02F1/1368 , H01L21/336 , H01L29/786
Abstract: PROBLEM TO BE SOLVED: To provide a thin-film transistor and its manufacture which reduce the manufacturing cost and improve process accuracy. SOLUTION: A thin-film transistor is provided with a polycrystalline silicon film 15, which is applied astride a step comprising an insulating light-shielding layer 13 formed on a glass board 11 and covers step sidewalls. The polycrystalline silicon film 15 is covered with an insulating film 19, and a conductive film 101 is formed on the upper part of the insulating film 19. The polycrystalline silicon film 15, positioned directly under the conductive film 101, functions as an active region 20. On a region positioned at the both edges of the active region 20 and substantially directly above the sidewalls of the step, a low-concentration region 16 having an impurity concentration which is lower than that of the lower part of the step is formed.
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公开(公告)号:JPH10163498A
公开(公告)日:1998-06-19
申请号:JP31895796
申请日:1996-11-29
Applicant: TOSHIBA CORP
Inventor: FUKUDA KAICHI , UEMOTO TSUTOMU , HIRAYAMA HIDEO , KAWAMURA SHINICHI , TORIYAMA SHIGETAKA
IPC: G02F1/136 , G02F1/1362 , G02F1/1368 , H01L21/336 , H01L21/77 , H01L21/84 , H01L29/786
Abstract: PROBLEM TO BE SOLVED: To fabricate a thin film transistor having a highly accurate LDD structure easily by providing an etching stopper layer between a lightly doped LDD region and a side wall. SOLUTION: An insular semiconductor layer is formed on an insulating substrate 1. The semiconductor layer has a central undoped channel region 2a, a lightly doped LDD region 2b contiguous to the channel region 2a, and a heavily doped low resistance layer 2c contiguous to the LDD region 2b. A gate insulator 3 is deposited on the entire surface while covering the semiconductor layer and a gate electrode 4 is formed in a region corresponding to the channel region 2a before forming an etching stopper layer 5 covering the gate electrode 4. Finally, a side wall 6 is formed on the side of the gate electrode 4 through the etching stopper layer 5. According to the structure, damage on the gate insulator 3 can be suppressed.
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公开(公告)号:JPH08274336A
公开(公告)日:1996-10-18
申请号:JP7267595
申请日:1995-03-30
Applicant: TOSHIBA CORP
Inventor: UEMOTO TSUTOMU , HIRAMATSU MASAHITO
IPC: H01L29/786 , H01L21/336
Abstract: PURPOSE: To provide a thin-film semiconductor field-effect transistor whose current driving capability is high, whose element size is small and which comprises an LDD structure in such a way that the number of processes is not increased so much. CONSTITUTION: In a coplanar MIS thin-film transistor, a semiconductor layer 3 composed of polycrystal silicon is formed as a channel region. In the transistor, a gate electrode 42 has a projection structure in which an area near a contact part with a gate oxide film 2 is larger than that on its opposite side, and the polycrystal silicon layer 3 which is faced is doped with the same conductivity-type deciding impurities as a source-drain so as to be thinner than the source-drain.
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公开(公告)号:JPH0536602A
公开(公告)日:1993-02-12
申请号:JP18910891
申请日:1991-07-30
Applicant: TOSHIBA CORP
Inventor: UEMOTO TSUTOMU , WATANABE YUKIO
Abstract: PURPOSE:To obtain a growth method of SiC crystal which has little crystal defect and is excellent in surface morphology. CONSTITUTION:In crystal whose main component is SiC of hexagonal or rhombohedral crystal, a (0001) face substrate 1a is used. After trenches 11 are formed on the substrate 1a, the same crystal as the substrate 1a is grown. Thereby surface morphology is very enhanced, the yield in a production process is improved, and a light emitting diode remarkably excellent in luminous efficiency can be obtained.
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公开(公告)号:JPH04193798A
公开(公告)日:1992-07-13
申请号:JP32087790
申请日:1990-11-27
Applicant: TOSHIBA CORP
Inventor: WATANABE YUKIO , UEMOTO TSUTOMU
Abstract: PURPOSE:To prevent the cracking, etc., of an SiC single crystal substrate by immersing this substrate into an Si melt and growing the SiC single crystal on the substrate, then taking the substrate out of the melt and bringing the substrate in the state of being wet with the melt into contact with heated graphite. CONSTITUTION:The SiC single crystal substrate 3 is immersed into the Si melt 2 in the graphite crucible 1 and the SiC single crystal is grown on the substrate 3 by a liquid phase epitaxy method. The substrate 3 is then taken out of the inside of the melt 2 by a pulling up rod 8 and, thereafter, the substrate 3 is brought into contact with the heated graphite 6 while the substrate 3 is held wet with the Si melt 1 to absorb the Si melt 2 sticking to the substrate 3 into the graphite 6. Since the melt remains less on the substrate 3 after the crystal growth in this way, the cracking of the substrate 3 after cooling occurring in the difference in the coeffts. of thermal expansion between the SiC and Si is prevented and the generation of the projections on the surface of the substrate 3 is prevented as well.
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公开(公告)号:JPH09129895A
公开(公告)日:1997-05-16
申请号:JP14723896
申请日:1996-06-10
Applicant: TOSHIBA ELECTRONIC ENG , TOSHIBA CORP
Inventor: OGASAWARA TAKAO , UEMOTO TSUTOMU
IPC: H01L21/265 , H01L21/223 , H01L21/336 , H01L21/77 , H01L21/84 , H01L29/786
Abstract: PROBLEM TO BE SOLVED: To enable impurity doping in a very small on and obtain throughput as high as possible, by a method wherein a source and a drain region are formed in an active layer by doping the active layer with impurity ions and then repeating the steps for cooling a substrate with cooling mechanism. SOLUTION: Doping is performed while controlling acceleration of impurity ions, in such a manner that the peak of impurity profile after doping exists in the range of a gate insulating film 5 or in the vicinity of an interface between the gate insulating film 5 and conducting layers 2a, 2b. When the doping is performed by using an ion doping apparatus, an ion beam current is intermittently sent fourth. Thereby it is made possible for the substrate temperature to exceed the heat resistance temperature of the photoresist, so that the photoresist can be used as a mask in the case of doping. Since the photoresist mask is excellent in working precision, impurity doping in a very small region is enabled, and therefore throughput can be improved.
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公开(公告)号:JPH0934635A
公开(公告)日:1997-02-07
申请号:JP17834795
申请日:1995-07-14
Applicant: TOSHIBA CORP
Inventor: UEMOTO TSUTOMU
Abstract: PROBLEM TO BE SOLVED: To input position information without externally adding a special device by inputting the position information in accordance with the position of light reception/non-reception of a light reception sensor provided in the peripheral part of the picture display area of a display panel. SOLUTION: In a display panel driving circuit 14, position information is inputted in accordance with the position of light reception/non-reception of a CCD array 13 as a light reception sensor element. When a material like a finger is put above this CCD array 13, a corresponding part is shadowed, and the quantity of input light is reduced. At the time of movement detection, only the part of the signal changed with time is detected. The change of the shadow at the time when the finger is brought into contact with a glass is checked to detect whether the finger is brought into contact with the glass or not. This CCD array 13 is attached to each of upper, lower, and right sides of a substrate 11 of a portable terminal to control the output picture of a display device part 12.
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公开(公告)号:JPH07172998A
公开(公告)日:1995-07-11
申请号:JP32071493
申请日:1993-12-21
Applicant: TOSHIBA CORP
Inventor: UEMOTO TSUTOMU
IPC: C30B11/00 , C30B11/06 , C30B29/36 , H01L21/208 , H01L33/34
Abstract: PURPOSE:To produce bulky silicon carbide single crystal without growing polycrystal and without increasing crystal defect. CONSTITUTION:Silicon carbide is formed by reaction of carbon as a constituent element of a crucible 12 in a silicon melt 17 put in the crucible 12 in a state of uniformed temperature by thermally insulating the circumference of the crucible 12 containing carbon as the constituent element. Silicon carbide single crystal 26 is grown on seed crystal 21 brought into contact with a melt surface while regulating the temperature of the melt surface by a heating means 14 set above the silicon melt 17.
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公开(公告)号:JPH06227886A
公开(公告)日:1994-08-16
申请号:JP1827293
申请日:1993-02-05
Applicant: TOSHIBA CORP
Inventor: UEMOTO TSUTOMU
IPC: C30B9/04 , C30B11/14 , C30B17/00 , C30B19/12 , C30B23/00 , C30B23/02 , C30B29/36 , C30B29/38 , H01L21/203 , H01L21/208
Abstract: PURPOSE:To provide the subject production method intended to suppress developing crystal defects, so designed that, for the side faces in contact with the main growth surface of a seed crystal, such seed crystal is provided so as to be slant from either plane, (0001)-plane or (1-100)-plane. CONSTITUTION:Inside a crucible 13 set up in a single crystal production unit by sublimation method, shelves 12 made of porous graphite carbon are arranged, material powder 15 such as of SiC is put thereon, a seed crystal is placed, and the whole system is sealed by a crucible cover 14. For the seed crystal 11, (0001)plane is set as the main growth surface, the seed crystal is finished in a conical form with the side face, (1-100)-plane, slant by at least 3 deg. from 90 deg. such as 45 deg. or 60 deg. with the main growth surface, and placed at a specified location. Then, the material powder 15 is heated to about 2500 deg.C, the seed crystal 11 to about 2300 deg.C, to sublimate the material and grow the seed crystal 11, thus affording the aimed SiC single crystal with few crystal defects and the main growth surface retained flat.
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