公开(公告)号：WO2009075681A1

公开(公告)日：2009-06-18

申请号：PCT/US2007/087173

申请日：2007-12-12

Applicant: TOUCHDOWN TECHNOLOGIES, INC.

Inventor： KARKLIN, Ken ,  GARABEDIAN, Raffi

IPC: G01R31/28

CPC classification number: G01R1/07364 ,  G01R31/2891

Abstract: A novel planarizing probe card (110) for testing a semiconductor device is presented. The probe card is adapted to come into. contact with a probe card mount (107) that is in adjustable contact with the prober. The probe card includes a printed circuit board (130) affixed to a stiffener (135) and a probe head (115) that is in electrical contact with the printed circuit board The probe head also includes a plurality of probe contactor tips (120) that define a first plane (152). The stiffener further contains at least two planarizing adjusters (137) that comes into contact with the probe card mount The adjusters may be actuated to alter the position of first plane. A surface of the semiconductor device under test (105) may define a second plane, and the adjusters may be adjusted to position the first plane to be substantially parallel to the second plane.

Abstract translation: 提出了一种用于测试半导体器件的新型平面化探针卡（110）。 探针卡适应进入。 与探头卡座（107）接触，探头卡座可与探测器调节接触。 探针卡包括固定到加强件（135）的印刷电路板（130）和与印刷电路板电接触的探针头（115）。探针头还包括多个探针接触器尖端（120），其中 限定第一平面（152）。 加强件还包含至少两个与探针卡座接触的平坦化调节器（137）。调节器可以被致动以改变第一平面的位置。 被测半导体器件（105）的表面可以限定第二平面，并且可以调节调节器以将第一平面定位成基本上平行于第二平面。

公开(公告)号：WO2008153558A2

公开(公告)日：2008-12-18

申请号：PCT/US2007/069896

申请日：2007-05-29

Applicant: TOUCHDOWN TECHNOLOGIES, INC.

Inventor： KARKLIN, Ken ,  GARABEDIAN, Raffi

IPC: G01R13/02

CPC classification number: G01R1/0735 ,  H01L24/45 ,  H01L2224/45144 ,  H01L2924/00014 ,  H01L2924/0105 ,  H01L2924/01079 ,  H01L2924/1461 ,  H01L2224/48 ,  H01L2924/00

Abstract: A novel device for testing semiconductor chips is disclosed. A benefit with all the embodiments described herein is that the device may experience zero (or near zero) nascent force. The device may be comprised of a printed circuit board (PCB)that has at least one PCB piercing structure, a probe contactor substrate that has at least one substrate piercing structure, wherein the substrate piercing structure is electrically connected to a probe contactor, and an interposer that has at least one electrical via made of a conductive elastomer. When the PCB piercing structure and the substrate piercing structure pierce the elastomer, the PCB becomes electrically connected to the probe contactor. Instead of the piercing structure, the PCB or the probe contractor substrate may be adhered to the elastomer by an adhesive, such that the PCB becomes electrically connected to the probe contactor. The PCB piercing structure and the substrate piercing structure may include a flying lead wire, soldered pins or pressed pins. The adhesives may include, but are not limited to, screenable conductive surface mount adhesives. Finally, a diagnostic computer may be electrically connected to the PCB to assist in testing the semiconductor chips.

Abstract translation: 公开了一种用于测试半导体芯片的新型器件。 本文描述的所有实施例的益处是设备可能经历零（或近零）新生力。 该装置可以包括具有至少一个PCB穿孔结构的印刷电路板（PCB），具有至少一个基板穿孔结构的探针接触器基板，其中基板穿孔结构电连接到探针接触器，以及 具有至少一个由导电弹性体制成的电通孔的插入器。 当PCB穿孔结构和基板穿孔结构刺穿弹性体时，PCB与探针接触器电连接。 代替穿孔结构，PCB或探针承载器基底可以通过粘合剂粘附到弹性体，使得PCB变得电连接到探针接触器。 PCB穿孔结构和基板穿孔结构可以包括飞行引线，焊接引脚或压脚。 粘合剂可以包括但不限于可屏蔽的导电表面贴装粘合剂。 最后，诊断计算机可以电连接到PCB以帮助测试半导体芯片。