公开(公告)号：US09620437B2

公开(公告)日：2017-04-11

申请号：US15047295

申请日：2016-02-18

Applicant: Tessera, Inc.

Inventor： Vage Oganesian ,  Belgacem Haba ,  Ilyas Mohammed ,  Craig Mitchell ,  Piyush Savalia

IPC: H01L23/48 ,  H01L21/768 ,  H01L23/498 ,  H01L21/78 ,  H01L23/14 ,  H01L23/00

CPC classification number: H01L23/481 ,  H01L21/76802 ,  H01L21/76805 ,  H01L21/76877 ,  H01L21/76898 ,  H01L21/78 ,  H01L23/145 ,  H01L23/147 ,  H01L23/49827 ,  H01L24/11 ,  H01L24/16 ,  H01L24/29 ,  H01L24/32 ,  H01L24/81 ,  H01L24/83 ,  H01L24/89 ,  H01L24/92 ,  H01L2224/0401 ,  H01L2224/0557 ,  H01L2224/13009 ,  H01L2224/13099 ,  H01L2224/16225 ,  H01L2224/16235 ,  H01L2224/83 ,  H01L2224/9202 ,  H01L2924/00014 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01019 ,  H01L2924/01023 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01049 ,  H01L2924/01061 ,  H01L2924/01074 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/12042 ,  H01L2924/14 ,  H01L2924/15311 ,  H01L2224/05552 ,  H01L2924/00

Abstract: A microelectronic assembly is provided which includes a first element consisting essentially of at least one of semiconductor or inorganic dielectric material having a surface facing and attached to a major surface of a microelectronic element at which a plurality of conductive pads are exposed, the microelectronic element having active semiconductor devices therein. A first opening extends from an exposed surface of the first element towards the surface attached to the microelectronic element, and a second opening extends from the first opening to a first one of the conductive pads, wherein where the first and second openings meet, interior surfaces of the first and second openings extend at different angles relative to the major surface of the microelectronic element. A conductive element extends within the first and second openings and contacts the at least one conductive pad.

公开(公告)号：US09362203B2

公开(公告)日：2016-06-07

申请号：US14499162

申请日：2014-09-27

Applicant: Tessera, Inc.

Inventor： Vage Oganesian ,  Belgacem Haba ,  Ilyas Mohammed ,  Craig Mitchell ,  Piyush Savalia

IPC: H01L23/48 ,  H01L21/768 ,  H01L25/065 ,  H01L25/00 ,  H01L23/00 ,  H01L23/50

CPC classification number: H01L23/481 ,  H01L21/76898 ,  H01L23/50 ,  H01L24/03 ,  H01L24/05 ,  H01L25/0657 ,  H01L25/50 ,  H01L2224/0401 ,  H01L2224/05009 ,  H01L2224/06181 ,  H01L2224/16145 ,  H01L2224/32145 ,  H01L2224/73204 ,  H01L2225/06513 ,  H01L2225/06541 ,  H01L2225/06544 ,  H01L2924/01322 ,  H01L2924/07811 ,  H01L2924/12042 ,  H01L2924/14 ,  H01L2924/00012 ,  H01L2924/00

Abstract: A method of fabricating a semiconductor assembly can include providing a semiconductor element having a front surface, a rear surface, and a plurality of conductive pads, forming at least one hole extending at least through a respective one of the conductive pads by processing applied to the respective conductive pad from above the front surface, forming an opening extending from the rear surface at least partially through a thickness of the semiconductor element, such that the at least one hole and the opening meet at a location between the front and rear surfaces, and forming at least one conductive element exposed at the rear surface for electrical connection to an external device, the at least one conductive element extending within the at least one hole and at least into the opening, the conductive element being electrically connected with the respective conductive pad.

Abstract translation: 制造半导体组件的方法可以包括提供具有前表面，后表面和多个导电焊盘的半导体元件，形成至少一个至少通过相应的一个导电焊盘延伸的孔， 形成从所述后表面至少部分地延伸半导体元件的厚度的开口，使得所述至少一个孔和所述开口在前表面和后表面之间的位置相遇，以及 形成在所述后表面处暴露的至少一个导电元件以电连接到外部装置，所述至少一个导电元件在所述至少一个孔内延伸并且至少进入所述开口中，所述导电元件与相应的导电垫电连接 。

公开(公告)号：US09287164B2

公开(公告)日：2016-03-15

申请号：US14731251

申请日：2015-06-04

Applicant: Tessera, Inc.

Inventor： Cyprian Uzoh ,  Vage Oganesian ,  Ilyas Mohammed ,  Craig Mitchell ,  Belgacem Haba

IPC: H01L23/52 ,  H01L21/768 ,  H01L23/522

CPC classification number: H01L21/76831 ,  H01L21/76807 ,  H01L21/76834 ,  H01L21/76852 ,  H01L21/76885 ,  H01L21/76897 ,  H01L23/5226 ,  H01L23/5283 ,  H01L23/53209 ,  H01L23/53238 ,  H01L23/53252 ,  H01L2221/1036 ,  H01L2924/0002 ,  H01L2924/00

Abstract: Cavities of possibly different widths can be etched in a stack of conductive layers (such as metal) using the same lithographic mask. Dielectric can be formed in the cavities. The cavities may contain voids. Other embodiments are also provided.

Abstract translation: 可以使用相同的光刻掩模在一堆导电层（例如金属）中蚀刻可能不同宽度的腔。 电介质可以形成在空腔中。 空腔可能含有空隙。 还提供了其他实施例。

公开(公告)号：US09224649B2

公开(公告)日：2015-12-29

申请号：US14451136

申请日：2014-08-04

Applicant: Tessera, Inc.

Inventor： Vage Oganesian ,  Belgacem Haba ,  Ilyas Mohammed ,  Piyush Savalia ,  Craig Mitchell

IPC: H01L23/488 ,  H01L21/60 ,  H01L21/768 ,  H01L23/48 ,  H01L23/00 ,  H01L25/065 ,  H01L25/00 ,  H01L23/31

CPC classification number: H01L21/76898 ,  H01L23/3171 ,  H01L23/481 ,  H01L23/562 ,  H01L24/03 ,  H01L24/05 ,  H01L24/16 ,  H01L24/80 ,  H01L24/81 ,  H01L25/0657 ,  H01L25/50 ,  H01L2224/02123 ,  H01L2224/0215 ,  H01L2224/0311 ,  H01L2224/0332 ,  H01L2224/03466 ,  H01L2224/03602 ,  H01L2224/0401 ,  H01L2224/05009 ,  H01L2224/05013 ,  H01L2224/05014 ,  H01L2224/05015 ,  H01L2224/05022 ,  H01L2224/05073 ,  H01L2224/05186 ,  H01L2224/05191 ,  H01L2224/05548 ,  H01L2224/05551 ,  H01L2224/05552 ,  H01L2224/05555 ,  H01L2224/05564 ,  H01L2224/05567 ,  H01L2224/0557 ,  H01L2224/05571 ,  H01L2224/05573 ,  H01L2224/05578 ,  H01L2224/05624 ,  H01L2224/05644 ,  H01L2224/05647 ,  H01L2224/05666 ,  H01L2224/06181 ,  H01L2225/06513 ,  H01L2225/06527 ,  H01L2225/06544 ,  H01L2225/06548 ,  H01L2924/00011 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01023 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/0105 ,  H01L2924/01074 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/01322 ,  H01L2924/014 ,  H01L2924/07811 ,  H01L2924/09701 ,  H01L2924/10253 ,  H01L2924/12042 ,  H01L2924/15165 ,  H01L2924/157 ,  H01L2924/15787 ,  H01L2924/15788 ,  H01L2924/351 ,  H01L2924/00014 ,  H01L2924/00 ,  H01L2224/81805 ,  H01L2924/06

Abstract: A microelectronic assembly includes a substrate and an electrically conductive element. The substrate can have a CTE less than 10 ppm/° C., a major surface having a recess not extending through the substrate, and a material having a modulus of elasticity less than 10 GPa disposed within the recess. The electrically conductive element can include a joining portion overlying the recess and extending from an anchor portion supported by the substrate. The joining portion can be at least partially exposed at the major surface for connection to a component external to the microelectronic unit.

Abstract translation: 微电子组件包括衬底和导电元件。 衬底可以具有小于10ppm /℃的CTE，具有不延伸穿过衬底的凹部的主表面和设置在凹部内的弹性模量小于10GPa的材料。 导电元件可以包括覆盖凹部并从由衬底支撑的锚定部分延伸的接合部分。 连接部分可以在主表面处至少部分暴露以连接到微电子单元外部的部件。

公开(公告)号：US20150249037A1

公开(公告)日：2015-09-03

申请号：US14708989

申请日：2015-05-11

Applicant: Tessera, Inc.

Inventor： Vage Oganesian ,  Belgacem Haba ,  Craig Mitchell ,  Ilyas Mohammed ,  Piyush Savalia

IPC: H01L21/768 ,  H01L25/00 ,  H01L25/11

CPC classification number: H01L21/76819 ,  H01L21/76877 ,  H01L23/13 ,  H01L23/3128 ,  H01L23/49827 ,  H01L23/4985 ,  H01L23/5389 ,  H01L24/18 ,  H01L24/19 ,  H01L24/24 ,  H01L24/25 ,  H01L24/82 ,  H01L24/97 ,  H01L25/105 ,  H01L25/117 ,  H01L25/16 ,  H01L25/50 ,  H01L2224/04105 ,  H01L2224/12105 ,  H01L2224/16227 ,  H01L2224/16235 ,  H01L2224/24227 ,  H01L2224/24247 ,  H01L2224/32225 ,  H01L2224/32245 ,  H01L2224/73267 ,  H01L2224/82 ,  H01L2224/92244 ,  H01L2224/97 ,  H01L2225/1023 ,  H01L2225/1029 ,  H01L2225/1035 ,  H01L2225/1041 ,  H01L2225/1052 ,  H01L2225/1058 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01023 ,  H01L2924/01029 ,  H01L2924/01032 ,  H01L2924/01033 ,  H01L2924/01047 ,  H01L2924/01049 ,  H01L2924/01061 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/01322 ,  H01L2924/014 ,  H01L2924/07811 ,  H01L2924/10253 ,  H01L2924/12042 ,  H01L2924/14 ,  H01L2924/15153 ,  H01L2924/15156 ,  H01L2924/15165 ,  H01L2924/15192 ,  H01L2924/15311 ,  H01L2924/15313 ,  H01L2924/15331 ,  H01L2924/157 ,  H01L2924/15788 ,  H01L2924/18161 ,  Y10T29/49002 ,  H01L2224/81 ,  H01L2924/00 ,  H01L2224/83

Abstract: A microelectronic unit can include a carrier structure having a front surface, a rear surface remote from the front surface, and a recess having an opening at the front surface and an inner surface located below the front surface of the carrier structure. The microelectronic unit can also include a microelectronic element having a top surface adjacent the inner surface, a bottom surface remote from the top surface, and a plurality of contacts at the top surface. The microelectronic unit can also include terminals electrically connected with the contacts of the microelectronic element. The terminals can be electrically insulated from the carrier structure. The microelectronic unit can also include a dielectric region contacting at least the bottom surface of the microelectronic element. The dielectric region can define a planar surface located coplanar with or above the front surface of the carrier structure.

Abstract translation: 微电子单元可以包括具有前表面，远离前表面的后表面和在前表面具有开口的凹部和位于载体结构的前表面下方的内表面的载体结构。 微电子单元还可以包括具有邻近内表面的顶表面，远离顶表面的底表面和在顶表面处的多个触点的微电子元件。 微电子单元还可以包括与微电子元件的触点电连接的端子。 端子可以与载体结构电绝缘。 微电子单元还可以包括至少与微电子元件的底表面接触的电介质区域。 电介质区域可以限定与载体结构的前表面共面或平行的平面。

公开(公告)号：US08835223B2

公开(公告)日：2014-09-16

申请号：US14162011

申请日：2014-01-23

Applicant: Tessera, Inc.

Inventor： Vage Oganesian ,  Belgacem Haba ,  Ilyas Mohammed ,  Craig Mitchell ,  Piyush Savalia

IPC: H01L29/788 ,  H01L23/00 ,  H01L23/538

CPC classification number: H01L24/80 ,  H01L21/6835 ,  H01L21/76805 ,  H01L21/76898 ,  H01L23/481 ,  H01L23/5384 ,  H01L24/02 ,  H01L24/24 ,  H01L24/25 ,  H01L24/27 ,  H01L24/32 ,  H01L24/82 ,  H01L24/83 ,  H01L24/92 ,  H01L24/94 ,  H01L25/0652 ,  H01L25/0657 ,  H01L25/50 ,  H01L2221/68327 ,  H01L2221/68372 ,  H01L2224/0231 ,  H01L2224/0235 ,  H01L2224/02371 ,  H01L2224/2401 ,  H01L2224/2405 ,  H01L2224/24146 ,  H01L2224/244 ,  H01L2224/2512 ,  H01L2224/32225 ,  H01L2224/82005 ,  H01L2224/821 ,  H01L2224/82106 ,  H01L2224/83005 ,  H01L2224/83191 ,  H01L2224/8385 ,  H01L2224/92 ,  H01L2224/9202 ,  H01L2224/92244 ,  H01L2224/93 ,  H01L2224/94 ,  H01L2225/06544 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01023 ,  H01L2924/01033 ,  H01L2924/12042 ,  H01L2924/14 ,  H01L2924/1433 ,  H01L2924/1434 ,  H01L2924/1436 ,  H01L2924/1437 ,  H01L2224/27 ,  H01L2224/83 ,  H01L2224/82 ,  H01L2924/00

Abstract: An assembly and method of making same are provided. The assembly can be formed by juxtaposing a first electrically conductive element overlying a major surface of a first semiconductor element with an electrically conductive pad exposed at a front surface of a second semiconductor element. An opening can be formed extending through the conductive pad of the second semiconductor element and exposing a surface of the first conductive element. The opening may alternatively be formed extending through the first conductive element. A second electrically conductive element can be formed extending at least within the opening and electrically contacting the conductive pad and the first conductive element. A third semiconductor element can be positioned in a similar manner with respect to the second semiconductor element.

Abstract translation: 提供了组装和制造方法。 可以通过将覆盖在第一半导体元件的主表面上的第一导电元件与暴露在第二半导体元件的前表面处的导电焊盘并置来形成该组件。 可以形成延伸穿过第二半导体元件的导电焊盘并露出第一导电元件的表面的开口。 开口可替代地形成为延伸穿过第一导电元件。 第二导电元件可以形成为至少在开口内延伸并且电接触导电垫和第一导电元件。 第三半导体元件可以相对于第二半导体元件以类似的方式定位。

公开(公告)号：US08796828B2

公开(公告)日：2014-08-05

申请号：US14104431

申请日：2013-12-12

Applicant: Tessera, Inc.

Inventor： Vage Oganesian ,  Belgacem Haba ,  Ilyas Mohammed ,  Piyush Savalia ,  Craig Mitchell

IPC: H01L21/60

CPC classification number: H01L21/76898 ,  H01L23/3171 ,  H01L23/481 ,  H01L23/562 ,  H01L24/03 ,  H01L24/05 ,  H01L24/16 ,  H01L24/80 ,  H01L24/81 ,  H01L25/0657 ,  H01L25/50 ,  H01L2224/02123 ,  H01L2224/0215 ,  H01L2224/0311 ,  H01L2224/0332 ,  H01L2224/03466 ,  H01L2224/03602 ,  H01L2224/0401 ,  H01L2224/05009 ,  H01L2224/05013 ,  H01L2224/05014 ,  H01L2224/05015 ,  H01L2224/05022 ,  H01L2224/05073 ,  H01L2224/05186 ,  H01L2224/05191 ,  H01L2224/05548 ,  H01L2224/05551 ,  H01L2224/05552 ,  H01L2224/05555 ,  H01L2224/05564 ,  H01L2224/05567 ,  H01L2224/0557 ,  H01L2224/05571 ,  H01L2224/05573 ,  H01L2224/05578 ,  H01L2224/05624 ,  H01L2224/05644 ,  H01L2224/05647 ,  H01L2224/05666 ,  H01L2224/06181 ,  H01L2225/06513 ,  H01L2225/06527 ,  H01L2225/06544 ,  H01L2225/06548 ,  H01L2924/00011 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01023 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/0105 ,  H01L2924/01074 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/01322 ,  H01L2924/014 ,  H01L2924/07811 ,  H01L2924/09701 ,  H01L2924/10253 ,  H01L2924/12042 ,  H01L2924/15165 ,  H01L2924/157 ,  H01L2924/15787 ,  H01L2924/15788 ,  H01L2924/351 ,  H01L2924/00014 ,  H01L2924/00 ,  H01L2224/81805 ,  H01L2924/06

Abstract: A microelectronic assembly includes a substrate and an electrically conductive element. The substrate can have a CTE less than 10 ppm/° C., a major surface having a recess not extending through the substrate, and a material having a modulus of elasticity less than 10 GPa disposed within the recess. The electrically conductive element can include a joining portion overlying the recess and extending from an anchor portion supported by the substrate. The joining portion can be at least partially exposed at the major surface for connection to a component external to the microelectronic unit.

Abstract translation: 微电子组件包括衬底和导电元件。 衬底可以具有小于10ppm /℃的CTE，具有不延伸穿过衬底的凹部的主表面和设置在凹部内的弹性模量小于10GPa的材料。 导电元件可以包括覆盖凹部并从由衬底支撑的锚定部分延伸的接合部分。 连接部分可以在主表面处至少部分地暴露以连接到微电子单元外部的部件。

公开(公告)号：US20140157592A1

公开(公告)日：2014-06-12

申请号：US14181466

申请日：2014-02-14

Applicant: Tessera, Inc.

Inventor： Cyprian Uzoh ,  Craig Mitchell

IPC: H01B13/00

CPC classification number: H01B13/0036 ,  H01L24/43 ,  H01L24/45 ,  H01L2224/43 ,  H01L2224/43848 ,  H01L2224/45015 ,  H01L2224/45105 ,  H01L2224/45109 ,  H01L2224/45111 ,  H01L2224/45124 ,  H01L2224/45144 ,  H01L2224/45147 ,  H01L2224/45155 ,  H01L2224/45157 ,  H01L2224/4516 ,  H01L2224/45163 ,  H01L2224/4518 ,  H01L2224/45184 ,  H01L2224/45565 ,  H01L2224/45572 ,  H01L2224/45573 ,  H01L2224/45605 ,  H01L2224/45609 ,  H01L2224/45611 ,  H01L2224/45644 ,  H01L2224/45647 ,  H01L2224/45655 ,  H01L2224/45657 ,  H01L2224/4568 ,  H01L2224/45686 ,  H01L2224/45693 ,  H01L2224/45887 ,  H01L2224/45893 ,  H01L2224/48 ,  H01L2224/85207 ,  H01L2924/01015 ,  H01L2924/10253 ,  Y10T29/49117 ,  H01L2924/01074 ,  H01L2924/00014 ,  H01L2924/0132 ,  H01L2924/00 ,  H01L2924/013 ,  H01L2924/04642 ,  H01L2924/0503 ,  H01L2924/01005 ,  H01L2924/01006

Abstract: A wire structure, which may be configured for a semiconductor device, is disclosed. The wire may include an elongate flexible core formed of a conductor material and a cladding layer covering an outer surface of the core. The cladding layer may be a conductor. In various aspects the cladding layer and core have a different grain sizes. An average grain size of the core material may several orders of magnitude greater than an average grain size of the cladding layer material. The cladding layer may be an alloy having a varying concentration of a minor component across its thickness. Methods of forming a wire structure are also disclosed.

Abstract translation: 公开了一种可被配置用于半导体器件的导线结构。 线可以包括由导体材料形成的细长柔性芯和覆盖芯的外表面的覆层。 包层可以是导体。 在各个方面，包覆层和芯具有不同的晶粒尺寸。 芯材的平均晶粒尺寸可以比包覆层材料的平均晶粒尺寸大几个数量级。 包覆层可以是在其厚度上具有不同浓度的次要组分的合金。 还公开了形成线结构的方法。

公开(公告)号：US09385036B2

公开(公告)日：2016-07-05

申请号：US14329744

申请日：2014-07-11

Applicant: Tessera, Inc.

Inventor： Cyprian Emeka Uzoh ,  Belgacem Haba ,  Craig Mitchell

IPC: H01L21/78 ,  H01L21/768 ,  H01L23/48 ,  H01L23/522 ,  H01L23/532 ,  H01L23/528 ,  H01L23/00

CPC classification number: H01L23/528 ,  H01L21/2885 ,  H01L21/3212 ,  H01L21/76802 ,  H01L21/76804 ,  H01L21/76807 ,  H01L21/76831 ,  H01L21/76834 ,  H01L21/7684 ,  H01L21/76843 ,  H01L21/76849 ,  H01L21/76852 ,  H01L21/76868 ,  H01L21/76873 ,  H01L21/76879 ,  H01L21/76883 ,  H01L21/76885 ,  H01L21/76898 ,  H01L23/481 ,  H01L23/5226 ,  H01L23/53209 ,  H01L23/53238 ,  H01L24/13 ,  H01L24/14 ,  H01L2221/1094 ,  H01L2224/0401 ,  H01L2224/0557 ,  H01L2224/05571 ,  H01L2224/13025 ,  H01L2224/13111 ,  H01L2224/14181 ,  H01L2924/00014 ,  H01L2924/00012 ,  H01L2224/05552

Abstract: Methods and apparatus for forming a semiconductor device are provided which may include any number of features. One feature is a method of forming an interconnect structure that results in the interconnect structure having a top surface and portions of the side walls of the interconnect structure covered in a dissimilar material. In some embodiments, the dissimilar material can be a conductive material or a nano-alloy. The interconnect structure can be formed by removing a portion of the interconnect structure, and covering the interconnect structure with the dissimilar material. The interconnect structure can comprise a damascene structure, such as a single or dual damascene structure, or alternatively, can comprise a silicon-through via (TSV) structure.

公开(公告)号：US09368476B2

公开(公告)日：2016-06-14

申请号：US14811177

申请日：2015-07-28

Applicant: Tessera, Inc.

Inventor： Vage Oganesian ,  Belgacem Haba ,  Ilyas Mohammed ,  Craig Mitchell ,  Piyush Savalia

IPC: H01L21/44 ,  H01L25/00 ,  H01L23/00 ,  H01L21/768 ,  H01L23/48 ,  H01L25/065 ,  H01L23/31

CPC classification number: H01L25/00 ,  H01L21/76805 ,  H01L21/76898 ,  H01L23/3178 ,  H01L23/481 ,  H01L24/81 ,  H01L24/92 ,  H01L24/94 ,  H01L25/0657 ,  H01L25/50 ,  H01L2224/0401 ,  H01L2224/05009 ,  H01L2224/13025 ,  H01L2224/16225 ,  H01L2224/29109 ,  H01L2224/29111 ,  H01L2224/29144 ,  H01L2224/29188 ,  H01L2224/2919 ,  H01L2224/32145 ,  H01L2224/32245 ,  H01L2224/73253 ,  H01L2224/83005 ,  H01L2224/9202 ,  H01L2224/94 ,  H01L2225/06513 ,  H01L2225/06527 ,  H01L2225/06541 ,  H01L2924/10253 ,  H01L2924/1032 ,  H01L2924/1037 ,  H01L2924/12042 ,  H01L2924/14 ,  H01L2924/1433 ,  H01L2924/1436 ,  H01L2924/1437 ,  H01L2924/15311 ,  H01L2224/83 ,  H01L2924/00

Abstract: A microelectronic assembly is provided in which first and second electrically conductive pads exposed at front surfaces of first and second microelectronic elements, respectively, are juxtaposed, each of the microelectronic elements embodying active semiconductor devices. An electrically conductive element may extend within a first opening extending from a rear surface of the first microelectronic element towards the front surface thereof, within a second opening extending from the first opening towards the front surface of the first microelectronic element, and within a third opening extending through at least one of the first and second pads to contact the first and second pads. Interior surfaces of the first and second openings may extend in first and second directions relative to the front surface of the first microelectronic element, respectively, to define a substantial angle.