公开(公告)号：US09984901B2

公开(公告)日：2018-05-29

申请号：US14933225

申请日：2015-11-05

Applicant: Tessera, Inc.

Inventor： Belgacem Haba ,  Teck-Gyu Kang ,  Ilyas Mohammed ,  Ellis Chau

IPC: H01L21/00 ,  H01L21/56 ,  G01R31/28 ,  H01L23/31 ,  H01L23/498 ,  H01L25/065 ,  H01L25/10 ,  H01L25/00 ,  H01L23/00

CPC classification number: H01L21/565 ,  G01R31/2886 ,  H01L21/56 ,  H01L23/3128 ,  H01L23/49805 ,  H01L23/49811 ,  H01L23/49816 ,  H01L23/49838 ,  H01L23/4985 ,  H01L23/49894 ,  H01L24/48 ,  H01L24/73 ,  H01L25/0657 ,  H01L25/105 ,  H01L25/50 ,  H01L2224/32145 ,  H01L2224/32225 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/73265 ,  H01L2225/0651 ,  H01L2225/0652 ,  H01L2225/06586 ,  H01L2225/1023 ,  H01L2225/1058 ,  H01L2225/1088 ,  H01L2924/00014 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/12041 ,  H01L2924/15331 ,  H01L2924/181 ,  H01L2924/1815 ,  H01L2924/19041 ,  H01L2924/3011 ,  H01L2924/3511 ,  H01L2924/00012 ,  H01L2924/00 ,  H01L2224/45099 ,  H01L2224/45015 ,  H01L2924/207

Abstract: A method of making a microelectronic assembly can include molding a dielectric material around at least two conductive elements which project above a height of a substrate having a microelectronic element mounted thereon, so that remote surfaces of the conductive elements remain accessible and exposed within openings extending from an exterior surface of the molded dielectric material. The remote surfaces can be disposed at heights from said surface of said substrate which are lower or higher than a height of the exterior surface of the molded dielectric material from the substrate surface. The conductive elements can be arranged to simultaneously carry first and second different electric potentials: e.g., power, ground or signal potentials.

公开(公告)号：US20140213021A1

公开(公告)日：2014-07-31

申请号：US14242279

申请日：2014-04-01

Applicant: TESSERA, INC.

Inventor： Belgacem Haba ,  Teck-Gyu Kang ,  Ilyas Mohammed ,  Ellis Chau

IPC: H01L21/56

CPC classification number: H01L21/565 ,  G01R31/2886 ,  H01L21/56 ,  H01L23/3128 ,  H01L23/49805 ,  H01L23/49811 ,  H01L23/49816 ,  H01L23/49838 ,  H01L23/4985 ,  H01L23/49894 ,  H01L24/48 ,  H01L24/73 ,  H01L25/0657 ,  H01L25/105 ,  H01L25/50 ,  H01L2224/32145 ,  H01L2224/32225 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/73265 ,  H01L2225/0651 ,  H01L2225/0652 ,  H01L2225/06586 ,  H01L2225/1023 ,  H01L2225/1058 ,  H01L2225/1088 ,  H01L2924/00014 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/12041 ,  H01L2924/15331 ,  H01L2924/181 ,  H01L2924/1815 ,  H01L2924/19041 ,  H01L2924/3011 ,  H01L2924/3511 ,  H01L2924/00012 ,  H01L2924/00 ,  H01L2224/45099 ,  H01L2224/45015 ,  H01L2924/207

Abstract: A method of making a microelectronic assembly can include molding a dielectric material around at least two conductive elements which project above a height of a substrate having a microelectronic element mounted thereon, so that remote surfaces of the conductive elements remain accessible and exposed within openings extending from an exterior surface of the molded dielectric material. The remote surfaces can be disposed at heights from said surface of said substrate which are lower or higher than a height of the exterior surface of the molded dielectric material from the substrate surface. The conductive elements can be arranged to simultaneously carry first and second different electric potentials: e.g., power, ground or signal potentials.

Abstract translation: 制造微电子组件的方法可以包括将电介质材料模制成围绕安装有微电子元件的衬底的高度突出的至少两个导电元件，使得导电元件的远端表面保持可接近并暴露在从 模制电介质材料的外表面。 所述远程表面可以从所述衬底的所述表面高度设置，所述表面低于或高于所述模制电介质材料的外表面与所述衬底表面的高度。 导电元件可被布置成同时携带第一和第二不同的电势：例如功率，接地或信号电位。

公开(公告)号：US20130203216A1

公开(公告)日：2013-08-08

申请号：US13792521

申请日：2013-03-11

Applicant: Tessera, Inc.

Inventor： Hiroaki Sato ,  Teck-Gyu Kang ,  Belgacem Haba ,  Philip R. Osborn ,  Wei-Shun Wang ,  Ellis Chau ,  Ilyas Mohammed ,  Norihito Masuda ,  Kazuo Sakuma ,  Kiyoaki Hashimoto ,  Kurosawa Inetaro ,  Tomoyuki Kikuchi

IPC: H01L21/48

CPC classification number: H01L21/4885 ,  H01L21/565 ,  H01L23/13 ,  H01L23/3121 ,  H01L23/49517 ,  H01L23/49811 ,  H01L23/5389 ,  H01L24/73 ,  H01L25/105 ,  H01L2224/16145 ,  H01L2224/16225 ,  H01L2224/16227 ,  H01L2224/32145 ,  H01L2224/32225 ,  H01L2224/32245 ,  H01L2224/45124 ,  H01L2224/48091 ,  H01L2224/48145 ,  H01L2224/48227 ,  H01L2224/4824 ,  H01L2224/48247 ,  H01L2224/73204 ,  H01L2224/73215 ,  H01L2224/73265 ,  H01L2225/06565 ,  H01L2225/1023 ,  H01L2225/1029 ,  H01L2225/1041 ,  H01L2225/1058 ,  H01L2924/00013 ,  H01L2924/181 ,  H01L2924/1815 ,  H01L2924/19107 ,  H01L2224/13099 ,  H01L2224/13599 ,  H01L2224/05599 ,  H01L2224/05099 ,  H01L2224/29099 ,  H01L2224/29599 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2924/00014

Abstract: A method of making a microelectronic package includes forming a dielectric encapsulation layer on an in-process unit having a substrate having a first surface and a second surface remote therefrom. A microelectronic element is mounted to the first surface of the substrate, and a plurality of conductive elements exposed at the first surface, at least some of which are electrically connected to the microelectronic element. Wire bonds have bases joined to the conductive elements and end surfaces remote from the bases and define an edge surface extending away between the base and the end surface. The encapsulation layer is formed to at least partially cover the first surface and portions of the wire bonds with unencapsulated portions of the wire bonds being defined by at least one of the end surface or a portion of the edge surface that is uncovered thereby.

公开(公告)号：US09349672B2

公开(公告)日：2016-05-24

申请号：US13661927

申请日：2012-10-26

Applicant: Tessera, Inc.

Inventor： Ilyas Mohammed ,  Belgacem Haba ,  Sean Moran ,  Wei-Shun Wang ,  Ellis Chau ,  Christopher Wade

IPC: H01L23/48 ,  H01L29/00 ,  H01L23/13 ,  H01L23/31 ,  H01L23/498 ,  H01L23/00 ,  H01L25/10

CPC classification number: H01L23/48 ,  H01L23/13 ,  H01L23/3121 ,  H01L23/49811 ,  H01L24/48 ,  H01L24/49 ,  H01L24/73 ,  H01L25/105 ,  H01L2224/06135 ,  H01L2224/32145 ,  H01L2224/32225 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/4824 ,  H01L2224/48465 ,  H01L2224/49431 ,  H01L2224/73215 ,  H01L2224/73265 ,  H01L2224/8592 ,  H01L2225/0651 ,  H01L2225/06555 ,  H01L2225/06562 ,  H01L2225/1023 ,  H01L2225/1058 ,  H01L2225/1088 ,  H01L2924/00014 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01014 ,  H01L2924/01015 ,  H01L2924/01027 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01074 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/15312 ,  H01L2924/1532 ,  H01L2924/15331 ,  H01L2924/181 ,  H01L2924/1815 ,  H01L2924/3511 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2224/45099 ,  H01L2224/05599

Abstract: A microelectronic package includes a lower unit having a lower unit substrate with conductive features and a top and bottom surface. The lower unit includes one or more lower unit chips overly/ing the top surface of the lower unit substrate that are electrically connected to the conductive features of the lower unit substrate. The microelectronic package also includes an upper unit including an upper unit substrate having conductive features, top and bottom surfaces and a hole extending between such top and bottom surfaces. The upper unit further includes one or more upper unit chips overlying the top surface of the upper unit substrate and electrically connected to the conductive features of the upper unit substrate by connections extending within the hole. The upper unit may include an upper unit encapsulant that covers the connections of the upper unit and the one or more upper unit chips.

公开(公告)号：US20140291871A1

公开(公告)日：2014-10-02

申请号：US14306947

申请日：2014-06-17

Applicant: Tessera, Inc.

Inventor： Belgacem Haba ,  Ellis Chau ,  Wael Zohni ,  Philip Damberg ,  Richard Dewitt Crisp

IPC: H01L23/00 ,  H01L23/64

CPC classification number: H01L23/64 ,  H01L23/3128 ,  H01L23/49816 ,  H01L23/552 ,  H01L24/06 ,  H01L24/29 ,  H01L24/45 ,  H01L24/48 ,  H01L24/49 ,  H01L24/73 ,  H01L25/0657 ,  H01L2224/02311 ,  H01L2224/02313 ,  H01L2224/02375 ,  H01L2224/02379 ,  H01L2224/04042 ,  H01L2224/05554 ,  H01L2224/32225 ,  H01L2224/45015 ,  H01L2224/45144 ,  H01L2224/45147 ,  H01L2224/48091 ,  H01L2224/48095 ,  H01L2224/48227 ,  H01L2224/49175 ,  H01L2224/73265 ,  H01L2225/0651 ,  H01L2225/06537 ,  H01L2225/06575 ,  H01L2924/00014 ,  H01L2924/01005 ,  H01L2924/01019 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01047 ,  H01L2924/01079 ,  H01L2924/014 ,  H01L2924/07802 ,  H01L2924/10161 ,  H01L2924/15311 ,  H01L2924/181 ,  H01L2924/19107 ,  H01L2924/30107 ,  H01L2924/3011 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2224/43

Abstract: A microelectronic assembly is disclosed that is capable of achieving a desired impedance for raised conductive elements. The microelectronic assembly may include an interconnection element, a surface conductive element, a microelectronic device, a plurality of raised conductive elements, and a bond element. The microelectronic device may overlie the dielectric element and at least one surface conductive element attached to the front surface. The plurality of raised conductive elements may connect the device contacts with the element contacts. The raised conductive elements may have substantial portions spaced a first height above and extending at least generally parallel to at least one surface conductive element, such that a desired impedance may be achieved for the raised conductive elements. A bond element may electrically connect at least one surface conductive element with at least one reference contact that may be connectable to a source of reference potential.

Abstract translation: 公开了能够实现用于凸起的导电元件的期望阻抗的微电子组件。 微电子组件可以包括互连元件，表面导电元件，微电子器件，多个凸起的导电元件和接合元件。 微电子器件可以覆盖在电介质元件和附接到前表面的至少一个表面导电元件。 多个凸起的导电元件可以将元件触点与元件触点连接。 升高的导电元件可以具有在第一高度之上并且至少大致平行于至少一个表面导电元件延伸的基本部分，使得可以为凸起的导电元件实现期望的阻抗。 键合元件可以将至少一个表面导电元件与可连接到参考电位源的至少一个参考触点电连接。

公开(公告)号：US20140217584A1

公开(公告)日：2014-08-07

申请号：US14252197

申请日：2014-04-14

Applicant: Tessera, Inc.

Inventor： Belgacem Haba ,  Ilyas Mohammed ,  Ellis Chau ,  Sang Il Lee ,  Kishor Desai

IPC: H01L23/498

CPC classification number: H01L23/49811 ,  H01L21/563 ,  H01L24/13 ,  H01L24/16 ,  H01L24/29 ,  H01L24/32 ,  H01L24/73 ,  H01L24/81 ,  H01L24/83 ,  H01L24/92 ,  H01L2224/131 ,  H01L2224/13109 ,  H01L2224/13111 ,  H01L2224/1601 ,  H01L2224/1605 ,  H01L2224/16225 ,  H01L2224/1703 ,  H01L2224/73104 ,  H01L2224/73204 ,  H01L2224/81143 ,  H01L2224/81193 ,  H01L2224/814 ,  H01L2224/81815 ,  H01L2224/83191 ,  H01L2224/83192 ,  H01L2224/83193 ,  H01L2224/8349 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01049 ,  H01L2924/014 ,  H01L2924/00014 ,  H01L2924/00

Abstract: A microelectronic assembly includes a first component with first conductive elements; a second component with second conductive elements; a bond metal; and an underfill layer. The posts have a height above the respective surface from which the posts project. A bond metal can be disposed between respective pairs of conductive elements, each pair including at least one of the posts and at least one of the first or second conductive elements confronting the at least one post. The bond metal can contact edges of the posts along at least one half the height of the posts. An underfill layer contacts and bonds the first and second surfaces of the first and second components. A residue of the underfill layer may be present at at least one interfacial surfaces between at least some of the posts and the bond metal or may be present within the bond metal.

Abstract translation: 微电子组件包括具有第一导电元件的第一部件; 具有第二导电元件的第二部件; 金属键; 和底部填充层。 柱子的高度高于柱子投影的相应表面。 键合金属可以设置在各对导电元件之间，每对包括至少一个柱和至少一个第一或第二导电元件面对至少一个柱。 接合金属可以沿着柱的高度的至少一半接触柱的边缘。 底部填充层接触并结合第一和​​第二组分的第一和第二表面。 底部填充层的残余物可以存在于至少一些柱和键合金属之间的至少一个界面处，或者可以存在于粘结金属中。

公开(公告)号：US20210050322A1

公开(公告)日：2021-02-18

申请号：US17086785

申请日：2020-11-02

Applicant: Tessera, Inc.

Inventor： Hiroaki Sato ,  Teck-Gyu Kang ,  Belgacem Haba ,  Philip R. Osborn ,  Wei-Shun Wang ,  Ellis Chau ,  Ilyas Mohammed ,  Norihito Masuda ,  Kazuo Sakuma ,  Kiyoaki Hashimoto ,  Kurosawa Inetaro ,  Tomoyuki Kikuchi

IPC: H01L23/00 ,  H01L23/13 ,  H01L23/31 ,  H01L23/495 ,  H01L23/498 ,  H01L25/065 ,  H01L25/10 ,  H01L25/16 ,  H01L25/04 ,  H01L27/146

Abstract: Apparatuses relating to a microelectronic package are disclosed. In one such apparatus, a substrate has first contacts on an upper surface thereof. A microelectronic die has a lower surface facing the upper surface of the substrate and having second contacts on an upper surface of the microelectronic die. Wire bonds have bases joined to the first contacts and have edge surfaces between the bases and corresponding end surfaces. A first portion of the wire bonds are interconnected between a first portion of the first contacts and the second contacts. The end surfaces of a second portion of the wire bonds are above the upper surface of the microelectronic die. A dielectric layer is above the upper surface of the substrate and between the wire bonds. The second portion of the wire bonds have uppermost portions thereof bent over to be parallel with an upper surface of the dielectric layer.

公开(公告)号：US10593643B2

公开(公告)日：2020-03-17

申请号：US16058425

申请日：2018-08-08

Applicant: Tessera, Inc.

Inventor： Hiroaki Sato ,  Teck-Gyu Kang ,  Belgacem Haba ,  Philip R. Osborn ,  Wei-Shun Wang ,  Ellis Chau ,  Ilyas Mohammed ,  Norihito Masuda ,  Kazuo Sakuma ,  Kiyoaki Hashimoto ,  Kurosawa Inetaro ,  Tomoyuki Kikuchi

IPC: H01L23/00 ,  H01L23/13 ,  H01L23/31 ,  H01L23/495 ,  H01L23/498 ,  H01L25/065 ,  H01L25/10 ,  H01L25/16 ,  H01L25/04 ,  H01L27/146 ,  H01L21/56 ,  H01L23/538

Abstract: Apparatuses relating to a microelectronic package are disclosed. In one such apparatus, a substrate has first contacts on an upper surface thereof. A microelectronic die has a lower surface facing the upper surface of the substrate and having second contacts on an upper surface of the microelectronic die. Wire bonds have bases joined to the first contacts and have edge surfaces between the bases and corresponding end surfaces. A first portion of the wire bonds are interconnected between a first portion of the first contacts and the second contacts. The end surfaces of a second portion of the wire bonds are above the upper surface of the microelectronic die. A dielectric layer is above the upper surface of the substrate and between the wire bonds. The second portion of the wire bonds have uppermost portions thereof bent over to be parallel with an upper surface of the dielectric layer.

公开(公告)号：US08981579B2

公开(公告)日：2015-03-17

申请号：US14306947

申请日：2014-06-17

Applicant: Tessera, Inc.

Inventor： Belgacem Haba ,  Ellis Chau ,  Wael Zohni ,  Philip Damberg ,  Richard Dewitt Crisp

IPC: H01L23/00 ,  H01L23/64 ,  H01L23/31 ,  H01L23/552 ,  H01L25/065 ,  H01L23/498

CPC classification number: H01L23/64 ,  H01L23/3128 ,  H01L23/49816 ,  H01L23/552 ,  H01L24/06 ,  H01L24/29 ,  H01L24/45 ,  H01L24/48 ,  H01L24/49 ,  H01L24/73 ,  H01L25/0657 ,  H01L2224/02311 ,  H01L2224/02313 ,  H01L2224/02375 ,  H01L2224/02379 ,  H01L2224/04042 ,  H01L2224/05554 ,  H01L2224/32225 ,  H01L2224/45015 ,  H01L2224/45144 ,  H01L2224/45147 ,  H01L2224/48091 ,  H01L2224/48095 ,  H01L2224/48227 ,  H01L2224/49175 ,  H01L2224/73265 ,  H01L2225/0651 ,  H01L2225/06537 ,  H01L2225/06575 ,  H01L2924/00014 ,  H01L2924/01005 ,  H01L2924/01019 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01047 ,  H01L2924/01079 ,  H01L2924/014 ,  H01L2924/07802 ,  H01L2924/10161 ,  H01L2924/15311 ,  H01L2924/181 ,  H01L2924/19107 ,  H01L2924/30107 ,  H01L2924/3011 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2224/43

Abstract: A microelectronic assembly is disclosed that is capable of achieving a desired impedance for raised conductive elements. The microelectronic assembly may include an interconnection element, a surface conductive element, a microelectronic device, a plurality of raised conductive elements, and a bond element. The microelectronic device may overlie the dielectric element and at least one surface conductive element attached to the front surface. The plurality of raised conductive elements may connect the device contacts with the element contacts. The raised conductive elements may have substantial portions spaced a first height above and extending at least generally parallel to at least one surface conductive element, such that a desired impedance may be achieved for the raised conductive elements. A bond element may electrically connect at least one surface conductive element with at least one reference contact that may be connectable to a source of reference potential.

Abstract translation: 公开了能够实现用于凸起的导电元件的期望阻抗的微电子组件。 微电子组件可以包括互连元件，表面导电元件，微电子器件，多个凸起的导电元件和接合元件。 微电子器件可以覆盖在电介质元件和附接到前表面的至少一个表面导电元件。 多个凸起的导电元件可以将元件触点与元件触点连接。 升高的导电元件可以具有在第一高度之上并且至少大致平行于至少一个表面导电元件延伸的基本部分，使得可以为凸起的导电元件实现期望的阻抗。 键合元件可以将至少一个表面导电元件与可连接到参考电位源的至少一个参考触点电连接。

公开(公告)号：US08969133B2

公开(公告)日：2015-03-03

申请号：US13792521

申请日：2013-03-11

Applicant: Tessera, Inc.

Inventor： Hiroaki Sato ,  Teck-Gyu Kang ,  Belgacem Haba ,  Philip R. Osborn ,  Wei-Shun Wang ,  Ellis Chau ,  Ilyas Mohammed ,  Norihito Masuda ,  Kazuo Sakuma ,  Kiyoaki Hashimoto ,  Kurosawa Inetaro ,  Tomoyuki Kikuchi

IPC: H01L21/00 ,  H01L21/48 ,  H01L23/31 ,  H01L23/498 ,  H01L23/538 ,  H01L25/10 ,  H01L23/13 ,  H01L23/495 ,  H01L21/56

Abstract: A method of making a microelectronic package includes forming a dielectric encapsulation layer on an in-process unit having a substrate having a first surface and a second surface remote therefrom. A microelectronic element is mounted to the first surface of the substrate, and a plurality of conductive elements exposed at the first surface, at least some of which are electrically connected to the microelectronic element. Wire bonds have bases joined to the conductive elements and end surfaces remote from the bases and define an edge surface extending away between the base and the end surface. The encapsulation layer is formed to at least partially cover the first surface and portions of the wire bonds with unencapsulated portions of the wire bonds being defined by at least one of the end surface or a portion of the edge surface that is uncovered thereby.