公开(公告)号：JPH11176953A

公开(公告)日：1999-07-02

申请号：JP2299898

申请日：1998-02-04

Applicant: UNITED MICROELECTRONICS CORP

Inventor： CHUNG CHENG-HUI ,  SHENG YI-CHUNG

IPC: H01L27/112 ,  H01L21/8246

Abstract: PROBLEM TO BE SOLVED: To form ROM having four threshold voltages and to store multi-bit data in a single memory unit by manufacturing a double layer structure memory transistor sharing the same gate oxide layer through the use of the manufacture technology of a thin film transistor. SOLUTION: A first photo resist layer 37 is formed so that it covers a semiconductor substrate 300, and a first coding step is executed. Then, second area/ third areas of a channel area 320 are doped. A thin film transistor oxide layer 39 is formed on the substrate 300 and a second polycrystalline silicon layer 41 which is doped in P-type is formed on the substrate 300. A second polycrystalline silicon layer 41 is doped by N-type dopant by using a photo mask 43. A second photo resist layer 44 is formed on the thin film transistor and a second coding step is executed. Thus, four state mask ROM is manufactured by such two coding steps.

公开(公告)号：NL1008061C2

公开(公告)日：1999-07-20

申请号：NL1008061

申请日：1998-01-19

Applicant: UNITED MICROELECTRONICS CORP

Inventor： CHUNG CHENG-HUI ,  SHENG YI-CHUNG

IPC: H01L21/8246 ,  H01L27/112

Abstract: The ROM is fabricated by providing a semiconductor substrate having a gate oxide layer, a first polysilicon layer, a plurality of source/drain regions, and a plurality of channel regions. By using a first photoresist to dope the channel regions, a first coding step is performed to obtain a transistor having 2 different threshold voltages. A thin film transistor oxide layer is formed over the substrate, patterned and etched to expose the source/drain regions. A second polysilicon layer is formed on the thin film transistor oxide, and a mask used to dope a part of it to form a plurality of doped regions. Using a second photoresist layer as a mask, a part of the second polysilicon layer corresponding to the channel regions is doped and a second coding step performed.

公开(公告)号：GB2333396B

公开(公告)日：1999-12-01

申请号：GB9800789

申请日：1998-01-14

Applicant: UNITED MICROELECTRONICS CORP

Inventor： CHUNG CHENG-HUI ,  SHENG YI-CHUNG

IPC: H01L21/8246 ,  H01L27/112

公开(公告)号：DE19804248A1

公开(公告)日：1999-06-10

申请号：DE19804248

申请日：1998-02-04

Applicant: UNITED MICROELECTRONICS CORP

Inventor： CHUNG CHENG-HUI ,  SHENG YI-CHUNG

IPC: H01L21/8246 ,  H01L27/112

Abstract: The ROM is fabricated by providing a semiconductor substrate having a gate oxide layer, a first polysilicon layer, a plurality of source/drain regions, and a plurality of channel regions. By using a first photoresist to dope the channel regions, a first coding step is performed to obtain a transistor having 2 different threshold voltages. A thin film transistor oxide layer is formed over the substrate, patterned and etched to expose the source/drain regions. A second polysilicon layer is formed on the thin film transistor oxide, and a mask used to dope a part of it to form a plurality of doped regions. Using a second photoresist layer as a mask, a part of the second polysilicon layer corresponding to the channel regions is doped and a second coding step performed.

公开(公告)号：SG70621A1

公开(公告)日：2000-02-22

申请号：SG1998000074

申请日：1998-01-08

Applicant: UNITED MICROELECTRONICS CORP

Inventor： CHUNG CHENG-HUI ,  SHENG YI-CHUNG

IPC: H01L21/8246 ,  H01L27/112 ,  H01L21/8236

公开(公告)号：GB2333396A

公开(公告)日：1999-07-21

申请号：GB9800789

申请日：1998-01-14

Applicant: UNITED MICROELECTRONICS CORP

Inventor： CHUNG CHENG-HUI ,  SHENG YI-CHUNG

IPC: H01L21/8246 ,  H01L27/112

Abstract: Using a first photoresist pattern 37 the channel regions 320 in the substrate are doped by ion implantation thereby performing a first coding step to provide a transistor having two different threshold values. A polysilicon layer 41 is doped by ion implantation using a second photoresist pattern 44 as a mask to perform a second coding step, thereby providing an inverse transistor with two different threshold values. In this manner double layered memory transistors sharing the same gate oxide 39 are used to form a ROM with four threshold values.