公开(公告)号：JP2000243829A

公开(公告)日：2000-09-08

申请号：JP13182298

申请日：1998-05-14

Applicant: UNITED MICROELECTRONICS CORP

Inventor： RI CHIJIN

IPC: H01L21/302 ,  H01L21/265 ,  H01L21/3065 ,  H01L21/311 ,  H01L21/768 ,  H01L23/522

Abstract: PROBLEM TO BE SOLVED: To lessen misalignment which occurs in a process where a via and a trench are formed by a method wherein a dual damask structure is formed using a layer of polysilicon or silicon nitride as a mask. SOLUTION: Two stop layers 306 and 310 are formed through two injection processes. An anisotropic etching operation is carried out using these stop layers. By this setup, a via and a trench are formed. The via and the trench are filled up with a conductive layer 314, and then the conductive layer 314 located above the stop layer 310 is removed, by which a dual damask structure is finished. An etching stop function can be easily controlled. A spacer can be used instead of a large number of masks. By this setup, misalignment can be protected.