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公开(公告)号：US12237415B2
公开(公告)日：2025-02-25
申请号：US18234889
申请日：2023-08-17
Applicant: UNITED MICROELECTRONICS CORP.
Inventor： Chi-Hsuan Tang , Chung-Ting Huang , Bo-Shiun Chen , Chun-Jen Chen , Yu-Shu Lin
Abstract: A method for fabricating a semiconductor device includes the steps of forming a gate structure on a substrate, forming an epitaxial layer adjacent to the gate structure, and then forming a first cap layer on the epitaxial layer. Preferably, a top surface of the first cap layer includes a curve concave upward and a bottom surface of the first cap layer includes a planar surface higher than a top surface of the substrate.
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公开(公告)号：US20240304705A1
公开(公告)日：2024-09-12
申请号：US18665600
申请日：2024-05-16
Applicant: UNITED MICROELECTRONICS CORP.
Inventor： Wei-Chih Chuang , Chia-Jong Liu , Kuang-Hsiu Chen , Chung-Ting Huang , Chi-Hsuan Tang , Kai-Hsiang Wang , Bing-Yang Jiang , Yu-Lin Cheng , Chun-Jen Chen , Yu-Shu Lin , Jhong-Yi Huang , Chao-Nan Chen , Guan-Ying Wu
IPC: H01L29/66 , H01L29/423
CPC classification number: H01L29/6656 , H01L29/42364
Abstract: A semiconductor device includes a gate structure on a substrate, a first spacer on a sidewall of the gate structure, a second spacer on a sidewall of the first spacer, a third spacer on a sidewall of the second spacer, and first and second stacks of an epitaxial layer and a cap layer respectively disposed at first and second sides of the gate structure. Preferably, a part of the second spacer comprises an I-shape, the cap layer includes a planar top surface and an inclined sidewall, the cap layer contacts the second spacer and the third spacer directly, and the cap layer includes a vertical sidewall connected to the inclined sidewall.
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公开(公告)号：US20230395719A1
公开(公告)日：2023-12-07
申请号：US18234889
申请日：2023-08-17
Applicant: UNITED MICROELECTRONICS CORP.
Inventor： Chi-Hsuan Tang , Chung-Ting Huang , Bo-Shiun Chen , Chun-Jen Chen , Yu-Shu Lin
CPC classification number: H01L29/7848 , H01L29/66553 , H01L21/0245 , H01L29/0657 , H01L29/6656
Abstract: A method for fabricating a semiconductor device includes the steps of forming a gate structure on a substrate, forming an epitaxial layer adjacent to the gate structure, and then forming a first cap layer on the epitaxial layer. Preferably, a top surface of the first cap layer includes a curve concave upward and a bottom surface of the first cap layer includes a planar surface higher than a top surface of the substrate.
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公开(公告)号：US11121254B2
公开(公告)日：2021-09-14
申请号：US16572568
申请日：2019-09-16
Applicant: UNITED MICROELECTRONICS CORP.
Inventor： Bo-Shiun Chen , Chun-Jen Chen , Chung-Ting Huang , Chi-Hsuan Tang , Jhong-Yi Huang , Guan-Ying Wu
Abstract: A transistor with strained superlattices as source/drain regions includes a substrate. A gate structure is disposed on the substrate. Two superlattices are respectively disposed at two sides of the gate structure and embedded in the substrate. The superlattices are strained. Each of the superlattices is formed by a repeated alternating stacked structure including a first epitaxial silicon germanium and a second epitaxial silicon germanium. The superlattices serve as source/drain regions of the transistor.
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公开(公告)号：US20200243664A1
公开(公告)日：2020-07-30
申请号：US16294877
申请日：2019-03-06
Applicant: UNITED MICROELECTRONICS CORP.
Inventor： Wei-Chih Chuang , Chia-Jong Liu , Kuang-Hsiu Chen , Chung-Ting Huang , Chi-Hsuan Tang , Kai-Hsiang Wang , Bing-Yang Jiang , Yu-Lin Cheng , Chun-Jen Chen , Yu-Shu Lin , Jhong-Yi Huang , Chao-Nan Chen , Guan-Ying Wu
IPC: H01L29/66 , H01L29/423
Abstract: A semiconductor device and a method for fabricating the semiconductor device are provided, in which the method includes the steps of forming a gate structure on a substrate, forming a spacer on a sidewall of the gate structure, forming two recesses adjacent to two sides of the spacer, performing a cleaning process to trim the spacer for forming a void between the spacer and the substrate, and forming two portions of an epitaxial layer in the two recesses. The semiconductor device preferably includes a cap layer on the two portions of the epitaxial layer as the cap layer includes a planar top surface and an inclined sidewall.
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Patent Agency Ranking
公开(公告)号：US12300743B2
公开(公告)日：2025-05-13
申请号：US18665600
申请日：2024-05-16
Applicant: UNITED MICROELECTRONICS CORP.
Inventor： Wei-Chih Chuang , Chia-Jong Liu , Kuang-Hsiu Chen , Chung-Ting Huang , Chi-Hsuan Tang , Kai-Hsiang Wang , Bing-Yang Jiang , Yu-Lin Cheng , Chun-Jen Chen , Yu-Shu Lin , Jhong-Yi Huang , Chao-Nan Chen , Guan-Ying Wu
IPC: H01L29/66 , H01L29/423
Abstract: A semiconductor device includes a gate structure on a substrate, a first spacer on a sidewall of the gate structure, a second spacer on a sidewall of the first spacer, a third spacer on a sidewall of the second spacer, and first and second stacks of an epitaxial layer and a cap layer respectively disposed at first and second sides of the gate structure. Preferably, a part of the second spacer comprises an I-shape, the cap layer includes a planar top surface and an inclined sidewall, the cap layer contacts the second spacer and the third spacer directly, and the cap layer includes a vertical sidewall connected to the inclined sidewall.
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公开(公告)号：US11735661B2
公开(公告)日：2023-08-22
申请号：US17330443
申请日：2021-05-26
Applicant: UNITED MICROELECTRONICS CORP.
Inventor： Kuang-Hsiu Chen , Sung-Yuan Tsai , Chi-Hsuan Tang , Chun-Wei Yu , Yu-Ren Wang
IPC: H01L29/78 , H01L29/08 , H01L29/36 , H01L29/66 , H01L29/423
CPC classification number: H01L29/7848 , H01L29/0847 , H01L29/36 , H01L29/42364 , H01L29/6653 , H01L29/6656 , H01L29/66575
Abstract: A semiconductor device and a method of forming the same, the semiconductor device includes a substrate, a gate structure and an epitaxial structure. The gate structure is disposed on the substrate, and the epitaxial structure is disposed in the substrate, at one side of the gate structure. The epitaxial structure includes a portion being protruded from a top surface of the substrate, and the portion includes a discontinuous sidewall, with a distance between a turning point of the discontinuous sidewalls and the gate structure being a greatest distance between the epitaxial structure and the gate structure.
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公开(公告)号：US11049971B2
公开(公告)日：2021-06-29
申请号：US16205233
申请日：2018-11-30
Applicant: UNITED MICROELECTRONICS CORP.
Inventor： Kuang-Hsiu Chen , Sung-Yuan Tsai , Chi-Hsuan Tang , Chun-Wei Yu , Yu-Ren Wang
IPC: H01L29/78 , H01L29/08 , H01L29/36 , H01L29/66 , H01L29/423
Abstract: A semiconductor device and a method of forming the same, the semiconductor device includes a substrate, a gate structure and an epitaxial structure. The gate structure is disposed on the substrate, and the epitaxial structure is disposed in the substrate, at one side of the gate structure. The epitaxial structure includes a portion being protruded from a top surface of the substrate, and the portion includes a discontinuous sidewall, with a distance between a turning point of the discontinuous sidewalls and the gate structure being a greatest distance between the epitaxial structure and the gate structure.
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公开(公告)号：US20250169119A1
公开(公告)日：2025-05-22
申请号：US19026289
申请日：2025-01-16
Applicant: UNITED MICROELECTRONICS CORP.
Inventor： Chi-Hsuan Tang , Chung-Ting Huang , Bo-Shiun Chen , Chun-Jen Chen , Yu-Shu Lin
Abstract: A method for fabricating a semiconductor device includes the steps of forming a gate structure on a substrate, forming an epitaxial layer adjacent to the gate structure, and then forming a first cap layer on the epitaxial layer. Preferably, a top surface of the first cap layer includes a curve concave upward and a bottom surface of the first cap layer includes a planar surface higher than a top surface of the substrate.
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公开(公告)号：US20230352587A1
公开(公告)日：2023-11-02
申请号：US18218098
申请日：2023-07-04
Applicant: UNITED MICROELECTRONICS CORP.
Inventor： Kuang-Hsiu Chen , Sung-Yuan Tsai , Chi-Hsuan Tang , Chun-Wei Yu , Yu-Ren Wang
IPC: H01L29/78 , H01L29/08 , H01L29/36 , H01L29/66 , H01L29/423
CPC classification number: H01L29/7848 , H01L29/0847 , H01L29/36 , H01L29/66575 , H01L29/6656 , H01L29/6653 , H01L29/42364
Abstract: A semiconductor device and a method of forming the same, the semiconductor device includes a substrate, a gate structure and an epitaxial structure. The gate structure is disposed on the substrate, and the epitaxial structure is disposed in the substrate, at one side of the gate structure. The epitaxial structure includes a portion being protruded from a top surface of the substrate, and the portion includes a discontinuous sidewall, with a distance between a turning point of the discontinuous sidewalls and the gate structure being a greatest distance between the epitaxial structure and the gate structure.
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