中科微点-全球专利检索

  1. Login
  2. Sign Up

Search Results

6 records (took 0.022 seconds)

    MANUFACTURING METHOD OF PATTERN TRANSFER MASK
    1.
    发明申请
    MANUFACTURING METHOD OF PATTERN TRANSFER MASK 有权
    图案转移掩模的制造方法

    公开(公告)号：US20160306274A1

    公开(公告)日：2016-10-20

    申请号：US14685615

    申请日：2015-04-14

    Applicant: UNITED MICROELECTRONICS CORP.

    Inventor： En-Chiuan Liou ,  Chia-Hsun Tseng ,  Tuan-Yen Yu ,  Po-Tsang Chen ,  Yi-Ting Chen

    IPC: G03F1/76 ,  H01L21/033

    CPC classification number: G03F1/76 ,  G03F1/54 ,  G03F1/58 ,  G03F1/70 ,  G03F1/72 ,  G03F1/80 ,  H01L21/0337

    Abstract: A manufacturing method of a pattern transfer mask includes the following steps. A basic mask is provided. The basic mask includes a plurality of patterns formed by a patterned absorber layer on a substrate according to a first writing layout. A photolithographic process is then performed by the basic mask to obtain individual depth of focus (iDoF) ranges of each of the patterns and a usable depth of focus (UDoF) range of the patterns. At least one constrain pattern dominating the UDoF range is selected from the patterns in the basic mask. The rest of the patterns except the constrain pattern are non-dominating patterns. A second writing layout is then generated for reducing a thickness of the patterned absorber layer in the constrain pattern or in the non-dominating patterns.

    Abstract translation: 图案转印掩模的制造方法包括以下步骤。 提供基本的面具。 基本掩模包括根据第一写入布局在基板上由图案化的吸收层形成的多个图案。 然后通过基本掩模执行光刻处理，以获得每种图案的单独焦点深度（iDoF）范围和图案的可用深度（UDoF）范围。 从基本掩码中的图案中选择至少一个主导UDoF范围的约束图案。 除了约束模式之外的其余模式是非主导模式。 然后生成第二写入布局以减小约束图案中的图案化吸收层的厚度或以非主导图案的方式。

    Manufacturing method of pattern transfer mask
    4.
    发明授权
    Manufacturing method of pattern transfer mask 有权
    图案转移掩模的制造方法

    公开(公告)号：US09581898B2

    公开(公告)日：2017-02-28

    申请号：US14685615

    申请日：2015-04-14

    Applicant: UNITED MICROELECTRONICS CORP.

    Inventor： En-Chiuan Liou ,  Chia-Hsun Tseng ,  Tuan-Yen Yu ,  Po-Tsang Chen ,  Yi-Ting Chen

    IPC: G03F1/76 ,  G03F1/80 ,  H01L21/033

    CPC classification number: G03F1/76 ,  G03F1/54 ,  G03F1/58 ,  G03F1/70 ,  G03F1/72 ,  G03F1/80 ,  H01L21/0337

    Abstract: A manufacturing method of a pattern transfer mask includes the following steps. A basic mask is provided. The basic mask includes a plurality of patterns formed by a patterned absorber layer on a substrate according to a first writing layout. A photolithographic process is then performed by the basic mask to obtain individual depth of focus (iDoF) ranges of each of the patterns and a usable depth of focus (UDoF) range of the patterns. At least one constrain pattern dominating the UDoF range is selected from the patterns in the basic mask. The rest of the patterns except the constrain pattern are non-dominating patterns. A second writing layout is then generated for reducing a thickness of the patterned absorber layer in the constrain pattern or in the non-dominating patterns.

    Abstract translation: 图案转印掩模的制造方法包括以下步骤。 提供基本的面具。 基本掩模包括根据第一写入布局在基板上由图案化的吸收层形成的多个图案。 然后通过基本掩模执行光刻处理，以获得每种图案的单独焦点深度（iDoF）范围和图案的可用深度（UDoF）范围。 从基本掩码中的图案中选择至少一个主导UDoF范围的约束图案。 除了约束模式之外的其余模式是非主导模式。 然后生成第二写入布局以减小约束图案中的图案化吸收层的厚度或以非主导图案的方式。

    MANUFACTURING METHOD OF SEMICONDUCTOR STRUCTURE
    5.
    发明申请
    MANUFACTURING METHOD OF SEMICONDUCTOR STRUCTURE 有权

    公开(公告)号：US20240387239A1

    公开(公告)日：2024-11-21

    申请号：US18209488

    申请日：2023-06-14

    Applicant: UNITED MICROELECTRONICS CORP.

    Inventor： Po-Tsang Chen ,  Chia-Ching Lin ,  Wen-Liang Huang

    IPC: H01L21/762 ,  H01L21/8234 ,  H01L29/66

    Abstract: A manufacturing method of a semiconductor structure includes the following steps. Fin-shaped structures are formed by patterning a first region of a semiconductor substrate. A first shallow trench is formed in a second region of the semiconductor substrate. A part of the semiconductor substrate is exposed by a bottom of the first shallow trench. A first etching process is performed. At least a part of one of the fin-shaped structures is removed by the first etching process, and the part of the semiconductor substrate exposed by the first shallow trench is partially removed by the first etching process for forming a first deep trench. The manufacturing method of the present invention may be used to achieve the purposes of process simplification and/or manufacturing cost reduction.

Patent Agency Ranking