公开(公告)号：WO1995027311A1

公开(公告)日：1995-10-12

申请号：PCT/US1995004053

申请日：1995-03-30

Applicant: UNITED TECHNOLOGIES CORPORATION

Inventor： UNITED TECHNOLOGIES CORPORATION ,  MALE, Barry, J. ,  ANNESER, Douglas L.

IPC: H01L27/118

CPC classification number: H01L27/11801

Abstract: A linear, bipolar-type application-specific integrated circuit includes a silicon substrate having a plurality of columns of device primitives or cells. Each cell comprises a plurality of identical NPN and PNP transistors flanking a centrally-located capacitor. Each transistor has dual emitters, bases and collectors. Open field areas are reserved on the silicon substrate on the sides of the columns of cells. Formed in these open field areas are precise thin film silicon chromium resistors. Power planes are also routed in these open field areas. A ground plane is routed in the vicinity of the centrally-located capacitor. Standard analog circuits are personalized using two layers of metallization interconnects.

Abstract translation: 线性双极型专用集成电路包括具有多列器件基元或单元的硅衬底。 每个单元包括位于中心位置的电容器两侧的多个相同的NPN和PNP晶体管。 每个晶体管具有双重发射器，基极和集电极。 开放场区域保留在单元格列侧面的硅衬底上。 在这些开放场地形成的是精密的薄膜硅铬电阻。 电力平面也可以在这些开阔的地区进行路由。 接地平面位于中心位置的电容器附近。 标准模拟电路使用两层金属化互连进行个性化。

公开(公告)号：EP0754352B1

公开(公告)日：2000-05-10

申请号：EP95916923.6

申请日：1995-03-30

Applicant: UNITED TECHNOLOGIES CORPORATION

Inventor： MALE, Barry, J. ,  ANNESER, Douglas L.

IPC: H01L27/118

CPC classification number: H01L27/11801

Abstract: A linear, bipolar-type application-specific integrated circuit includes a silicon substrate having a plurality of columns of device primitives or cells. Each cell comprises a plurality of identical NPN and PNP transistors flanking a centrally-located capacitor. Each transistor has dual emitters, bases and collectors. Open field areas are reserved on the silicon substrate on the sides of the columns of cells. Formed in these open field areas are precise thin film silicon chromium resistors. Power planes are also routed in these open field areas. A ground plane is routed in the vicinity of the centrally-located capacitor. Standard analog circuits are personalized using two layers of metallization interconnects.

公开(公告)号：EP0754352A1

公开(公告)日：1997-01-22

申请号：EP95916923.0

申请日：1995-03-30

Applicant: UNITED TECHNOLOGIES CORPORATION

Inventor： MALE, Barry, J. ,  ANNESER, Douglas L.

IPC: H01L27 ,  H01L21

CPC classification number: H01L27/11801

Abstract: A linear, bipolar-type application-specific integrated circuit includes a silicon substrate having a plurality of columns of device primitives or cells. Each cell comprises a plurality of identical NPN and PNP transistors flanking a centrally-located capacitor. Each transistor has dual emitters, bases and collectors. Open field areas are reserved on the silicon substrate on the sides of the columns of cells. Formed in these open field areas are precise thin film silicon chromium resistors. Power planes are also routed in these open field areas. A ground plane is routed in the vicinity of the centrally-located capacitor. Standard analog circuits are personalized using two layers of metallization interconnects.