公开(公告)号：EP1927174A4

公开(公告)日：2010-05-26

申请号：EP06814981

申请日：2006-09-19

Applicant: UNIV CALIFORNIA

Inventor： MA YINTAT ,  LI GUANN-PYNG

IPC: H01G2/12

CPC classification number: H01L27/0255 ,  H03F1/22 ,  H03F1/52 ,  H03F3/605 ,  H03F2200/444 ,  H03F2200/451 ,  H03F2200/93

公开(公告)号：AU2003205181A1

公开(公告)日：2003-09-02

申请号：AU2003205181

申请日：2003-01-16

Applicant: UNIV CALIFORNIA

Inventor： MA YINTAT ,  LI GUANN-PYNG

IPC: H01L27/02 ,  H02H9/00

Abstract: A low loading capacitance on-chip electrostatic discharge (ESD) protection circuit for compound semiconductor power amplifiers is disclosed, which does not degrade the circuit RF performance. Its principle of operation and simulation results regarding capacitance loading, leakage current, degradation to RF performance are disclosed. The design, loading effect over frequency, robustness over process and temperature variation and application to an RF power amplifier is presented in detail. The ESD circuit couples an input to ground during ESD surges through a diode string coupled to the input, and a transistor switch or Darlington pair having its gate coupled to and triggered by the diode string. The Darlington pair couples the input to ground when triggered through a low impedance path in parallel to the diode string. A reverse diode also couples ground to the input on reverse surges.

公开(公告)号：WO2007035777A3

公开(公告)日：2009-05-07

申请号：PCT/US2006036552

申请日：2006-09-19

Applicant: UNIV CALIFORNIA ,  MA YINTAT ,  LI GUANN-PYNG

Inventor： MA YINTAT ,  LI GUANN-PYNG

IPC: H01G2/12

CPC classification number: H01L27/0255 ,  H03F1/22 ,  H03F1/52 ,  H03F3/605 ,  H03F2200/444 ,  H03F2200/451 ,  H03F2200/93

Abstract: Improved protection circuits are provided for use as voltage overload protection circuits, ESD protection circuits for RF input pins, and unit protection cells for distributed amplifiers. Preferably, the protection circuits include a positive threshold voltage trigger used to trigger a switch wherein the trigger includes a diode string in series with a resistor and the switch includes a bipolar transistor switch in series with a single reverse diode. Alternatively, the trigger includes a diode string in series with a single diode and a single resistor, and is used to trigger a Darlington pair transistor switch in series with a single reverse diode. In another embodiment, a Darlington pair transistor switch is triggered by a capacitor. In use with distributive amplifiers, the ESD protection circuits are preferably absorbed inside the artificial transmission lines of the distributed amplifier.

Abstract translation: 提供改进的保护电路用作电压过载保护电路，RF输入引脚的ESD保护电路和用于分布式放大器的单元保护单元。 优选地，保护电路包括用于触发开关的正阈值电压触发器，其中触发器包括与电阻器串联的二极管串，并且开关包括与单个反向二极管串联的双极晶体管开关。 或者，触发器包括与单个二极管和单个电阻器串联的二极管串，并且用于与单个反向二极管串联触发达林顿对晶体管开关。 在另一个实施例中，达林顿对晶体管开关由电容器触发。 与分布放大器一起使用时，ESD保护电路优选地被吸收在分布式放大器的人造传输线内部。

公开(公告)号：WO03063203A2

公开(公告)日：2003-07-31

申请号：PCT/US0301420

申请日：2003-01-16

Applicant: UNIV CALIFORNIA ,  MA YINTAT ,  LI GUANN-PYNG

Inventor： MA YINTAT ,  LI GUANN-PYNG

IPC: H01L27/02 ,  H02H9/00 ,  H01L

CPC classification number: H01L27/0255 ,  H01L27/0259

Abstract: A low loading capacitance on-chip electrostatic discharge (ESD) protection circuit for compound semiconductor power amplifiers is disclosed, which does not degrade the circuit RF performance. Its principle of operation and simulation results regarding capacitance loading, leakage current, degradation to RF performance are disclosed. The design, loading effect over frequency, robustness over process and temperature variation and application to an RF Power amplifier is presented in detail. The ESD circuit couples an input to ground during ESD surges through a diode string coupled to the input, and a transistor switch or Darlington pair having its gate coupled to and triggered by the diode string. The Darlington pair couples the input to ground when triggered through a low impedance path in parallel to the diode string. A reverse diode also couples ground to the input on reverse surges.

Abstract translation: 公开了用于复合半导体功率放大器的低负载电容片上静电放电（ESD）保护电路，其不会降低电路RF性能。 公开了其关于电容负载，漏电流，RF性能劣化的操作和仿真结果原理。 详细介绍了频率的设计，负载效应，过程的鲁棒性和温度变化以及RF功率放大器的应用。 ESD电路在ESD浪涌期间通过耦合到输入的二极管串耦合输入到地，以及晶体管开关或达林顿对，其栅极耦合到二极管串并由二极管串触发。 当通过与二极管串并联的低阻抗路径触发时，达林顿对将输入耦合到地。 反向二极管也将接地连接到反向浪涌的输入。