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公开(公告)号:CA2447546A1
公开(公告)日:2004-05-07
申请号:CA2447546
申请日:2003-10-31
Applicant: XEROX CORP
Inventor: NEARY MICHAEL B , RAHNAVARD MOHAMMAD H , BARETSKY THOMAS M , THOMAS MICHAEL J , RAUCH RUSSELL B
Abstract: A system architecture for scanned non-linearity correction in a printer us es any raster output scanner having scanned non-linearity profile previously stored in memory from a test station installed with any pixel board. The pixel board includes a correction table register wherein the pixel board utilizes the scanned non-linearity profile of the raster output scanner to calculate the correcti on table register to correct for pixel misregistration.
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公开(公告)号:DE60038601D1
公开(公告)日:2008-05-29
申请号:DE60038601
申请日:2000-12-07
Applicant: XEROX CORP
Inventor: NEARY MICHAEL B
Abstract: A reference frequency and facet to facet correction circuit utilizes a phase locked loop which includes a digital phase detector to measure the time difference between the end of scan (EOS) and the end of count (EOC) of each facet and store them in a lookup table. The phase locked loop continuously generates an average time value form the time differences of all the facets of the polygon. The phase locked loop also adds the errors of each facet to the average time value and uses the result to correct the frequency of a pixel clock generator for both the reference frequency and facet to facet errors.
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公开(公告)号:CA2447546C
公开(公告)日:2007-08-07
申请号:CA2447546
申请日:2003-10-31
Applicant: XEROX CORP
Inventor: NEARY MICHAEL B , THOMAS MICHAEL J , RAHNAVARD MOHAMMAD H , BARETSKY THOMAS M , RAUCH RUSSELL B
IPC: B41J2/44 , G03G15/05 , G02B26/10 , G02B26/12 , G03G21/00 , G06K15/12 , G06K15/14 , H04N1/053 , H04N1/113
Abstract: A system architecture for scanned non-linearity correction in a printer us es any raster output scanner having scanned non-linearity profile previously stored in memory from a test station installed with any pixel board. The pixel board includes a correction table register wherein the pixel board utilizes the scanned non-linearity profile of the raster output scanner to calculate the correcti on table register to correct for pixel misregistration.
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公开(公告)号:DE60038601T2
公开(公告)日:2009-06-10
申请号:DE60038601
申请日:2000-12-07
Applicant: XEROX CORP
Inventor: NEARY MICHAEL B
Abstract: A reference frequency and facet to facet correction circuit utilizes a phase locked loop which includes a digital phase detector to measure the time difference between the end of scan (EOS) and the end of count (EOC) of each facet and store them in a lookup table. The phase locked loop continuously generates an average time value form the time differences of all the facets of the polygon. The phase locked loop also adds the errors of each facet to the average time value and uses the result to correct the frequency of a pixel clock generator for both the reference frequency and facet to facet errors.
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公开(公告)号:BR0304804A
公开(公告)日:2004-08-31
申请号:BR0304804
申请日:2003-10-31
Applicant: XEROX CORP
Inventor: RAUCH RUSSEL B , NEARY MICHAEL B , RAHNAVARD MOHAMMAD H , THOMAS MICHAEL J , BARETSKY THOMAS M
Abstract: A system architecture for scanned non-linearity correction in a printer uses any raster output scanner having scanned non-linearity profile previously stored in memory from a test station installed with any pixel board. The pixel board includes a correction table register wherein the pixel board utilizes the scanned non-linearity profile of the raster output scanner to calculate the correction table register to correct for pixel misregistration.
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公开(公告)号:JP2004163936A
公开(公告)日:2004-06-10
申请号:JP2003377010
申请日:2003-11-06
Applicant: Xerox Corp , ゼロックス コーポレイションXerox Corporation
Inventor: RAUCH RUSSELL B , NEARY MICHAEL B , RAHNAVARD MOHAMMAD H , THOMAS MICHAEL J , BARETSKY THOMAS M
CPC classification number: G06K15/1219 , H04N1/053 , H04N1/1135 , H04N2201/04712 , H04N2201/04734 , H04N2201/04744 , H04N2201/04777 , H04N2201/04793
Abstract: PROBLEM TO BE SOLVED: To provide a system architecture of nonlinearity correction in which "the mix and match" is given to an ROS and a pixel board adopted at random in manufacturing a printing system. SOLUTION: The system architecture for correcting the nonlinearity of scanning line in a printer uses an arbitral raster output scanner in which a nonlinear profile from a test station fitted on an arbitral pixel board is preliminarily stored in a memory. The pixel board includes a correction table resistor, and the pixel board calculates a correction table resister by making use of the scanning nonlinearity profile of the raster output scanner and corrects the deviation of position of pixels. COPYRIGHT: (C)2004,JPO
Abstract translation: 要解决的问题:提供一种非线性校正的系统架构,其中“混合”给予在制造打印系统中随机采用的ROS和像素板。 解决方案:用于校正打印机中扫描线的非线性的系统架构使用仲裁光栅输出扫描器,其中来自安装在仲裁像素板上的测试台的非线性分布预先存储在存储器中。 像素板包括校正表电阻器,并且像素板通过利用光栅输出扫描器的扫描非线性分布来校正校正表寄存器,并且校正像素的位置偏差。 版权所有(C)2004,JPO
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公开(公告)号:JP2001183600A
公开(公告)日:2001-07-06
申请号:JP2000378892
申请日:2000-12-13
Applicant: XEROX CORP
Inventor: NEARY MICHAEL B
Abstract: PROBLEM TO BE SOLVED: To provide a circuit which corrects a reference frequency error and errors for every facet by using a phase-locked loop. SOLUTION: The phase-locked loop includes a digital phase detector whish measures the time differences between the ends of scanning of each facet and the ends of counting and stores them in a look-up table. The phase-locked loop generates a mean time value continuously from the time differences of all the faucets of a polygon. Further, the phase-locked loop adds errors of each facet to the mean time value and uses the result to correct the frequency of a pixel clock generator for both the reference frequency error and the errors for every facets.
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