公开(公告)号：JPH0737984A

公开(公告)日：1995-02-07

申请号：JP34819491

申请日：1991-12-04

Applicant: XILINX INC

Inventor： EFU ERITSUKU GOUCHINGU ,  DEBITSUTO BII PAARAA ,  JIYON II MAHOONII

IPC: G01R31/317 ,  G11C17/18 ,  H01L21/82 ,  H03K19/177

Abstract: PURPOSE: To connect logic devices via line segments capable of being coupled according to programs of anti-fuses. CONSTITUTION: Program lines VP0-VP3 are connected to terminals of anti-fuses F1 in an array through connection line segments one to one. The line segments connected to both terminals of one anti-fuse are connected to different program lines, because different voltages are applied to two terminals of the anti-fuse. An addressing structure selectively connects the line segments respectively to the program lines and programs the selected anti-fuse with a programming voltage applied to the programming line. It has an addressing characteristic which addresses, about the line segments to be connected, two transistors one after the other and keeps the addressed transistors T51, T52 set on, utilizing capacitive pump decoders D51, D52.