公开(公告)号：JPH07147303A

公开(公告)日：1995-06-06

申请号：JP15180094

申请日：1994-06-10

Applicant: XILINX INC

Inventor： SHIERUDON OO RAASON ,  RONARUDO JIEI MATSUKU

IPC: G01R31/26 ,  G06F11/22 ,  H01L21/66 ,  H01L23/544

Abstract: PURPOSE: To reduce the testing time of a die on a wafer by allowing a file created for a wafer on which a qualitative die is positioned to store each position of the quality die, performing access to the prescribed memory cell of the die, deciding the related file of the die, and testing the quality die of the wafer. CONSTITUTION: A die which has been decided as a quality die (all memory cells indicate a proper threshold voltage) is printed electrically. The prescribed memory cell of each qualitative die called an 'identfication(ID) cell' is programmed, so that a file related with a specific wafer can be identified. The position of each quality die on the wafer is stored in the file related to the wafer. All the wafers are placed under a prescribed adverse condition, and the radiation of the memory cells of the wafer is accelerated. The ID cell of the electrically printed first die of the wafer is read. After the first position in the file has been read, this process is allowed to proceed directly to the first 'qualitaty' die decided by a first wafer sort 400 of the wafer.