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Patent Agency Ranking
公开(公告)号：US07748115B2
公开(公告)日：2010-07-06
申请号：US11777988
申请日：2007-07-13
Applicant: Sunappan Vasudivan , Chee Wai Lu , Boon Keng Lok
Inventor： Sunappan Vasudivan , Chee Wai Lu , Boon Keng Lok
CPC classification number: H05K1/186 , H05K1/0231 , H05K3/4623 , H05K2201/09536 , H05K2201/10636 , H05K2203/063 , Y02P70/611 , Y10T29/49128 , Y10T29/4913 , Y10T29/49144 , Y10T29/49165
Abstract: A method of forming a circuit board, the method comprising mounting at least one passive component on a first surface of a first laminate material; interconnecting the passive component to contact traces and vias of the first laminate material; and attaching a second laminate material to the first surface of the first laminate material utilizing a lamination process, the second laminate material sheet having at least one of a recess, a through-hole or both formed therein for accommodating the passive component in the second laminate.
Abstract translation: 一种形成电路板的方法，所述方法包括在第一层压材料的第一表面上安装至少一个无源部件; 将所述被动部件与所述第一层压材料的接触迹线和通孔相互连接; 并且利用层压工艺将第二层压材料附着到第一层压材料的第一表面上，第二层压材料板具有形成在其中的凹部，通孔或两者中的至少一个，用于容纳第二层压体中的被动部件 。
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公开(公告)号：US20060007662A1
公开(公告)日：2006-01-12
申请号：US10888076
申请日：2004-07-09
Applicant: Sunappan Vasudivan , Chee Lu , Boon Lok
Inventor： Sunappan Vasudivan , Chee Lu , Boon Lok
IPC: H05K7/06
CPC classification number: H05K1/186 , H05K1/0231 , H05K3/4623 , H05K2201/09536 , H05K2201/10636 , H05K2203/063 , Y02P70/611 , Y10T29/49128 , Y10T29/4913 , Y10T29/49144 , Y10T29/49165
Abstract: A method of forming a circuit board, the method comprising mounting at least one passive component on a first surface of a first laminate material; interconnecting the passive component to contact traces and vias of the first laminate material; and attaching a second laminate material to the first surface of the first laminate material utilizing a lamination process, the second laminate material sheet having at least one of a recess, a through-hole or both formed therein for accommodating the passive component in the second laminate.
Abstract translation: 一种形成电路板的方法，所述方法包括在第一层压材料的第一表面上安装至少一个无源部件; 将所述被动部件与所述第一层压材料的接触迹线和通孔相互连接; 并且利用层压工艺将第二层压材料附着到第一层压材料的第一表面上，第二层压材料板具有形成在其中的凹部，通孔或两者中的至少一个，用于容纳第二层压体中的被动部件 。
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公开(公告)号：US07359213B2
公开(公告)日：2008-04-15
申请号：US10888076
申请日：2004-07-09
Applicant: Sunappan Vasudivan , Chee Wai Lu , Boon Keng Lok
Inventor： Sunappan Vasudivan , Chee Wai Lu , Boon Keng Lok
IPC: H05K1/18
CPC classification number: H05K1/186 , H05K1/0231 , H05K3/4623 , H05K2201/09536 , H05K2201/10636 , H05K2203/063 , Y02P70/611 , Y10T29/49128 , Y10T29/4913 , Y10T29/49144 , Y10T29/49165
Abstract: A circuit board is formed by mounting at least one passive component on a first surface of a first laminate material; interconnecting the passive component to contact traces and vias of the first laminate material; and attaching a second laminate material to the first surface of the first laminate material utilizing a lamination process, the second laminate material sheet having at least one of a recess, a through-hole or both formed therein for accommodating the passive component in the second laminate.
Abstract translation: 电路板通过将至少一个无源部件安装在第一层压材料的第一表面上而形成; 将所述被动部件与所述第一层压材料的接触迹线和通孔相互连接; 并且利用层压工艺将第二层压材料附着到第一层压材料的第一表面上，第二层压材料板具有形成在其中的凹部，通孔或两者中的至少一个，用于容纳第二层压体中的被动部件 。
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公开(公告)号：US20080000676A1
公开(公告)日：2008-01-03
申请号：US11777988
申请日：2007-07-13
Applicant: SUNAPPAN VASUDIVAN , CHEE LU , BOON LOK
Inventor： SUNAPPAN VASUDIVAN , CHEE LU , BOON LOK
CPC classification number: H05K1/186 , H05K1/0231 , H05K3/4623 , H05K2201/09536 , H05K2201/10636 , H05K2203/063 , Y02P70/611 , Y10T29/49128 , Y10T29/4913 , Y10T29/49144 , Y10T29/49165
Abstract: A method of forming a circuit board, the method comprising mounting at least one passive component on a first surface of a first laminate material; interconnecting the passive component to contact traces and vias of the first laminate material; and attaching a second laminate material to the first surface of the first laminate material utilizing a lamination process, the second laminate material sheet having at least one of a recess, a through-hole or both formed therein for accommodating the passive component in the second laminate.
Abstract translation: 一种形成电路板的方法，所述方法包括在第一层压材料的第一表面上安装至少一个无源部件; 将所述被动部件与所述第一层压材料的接触迹线和通孔相互连接; 并且利用层压工艺将第二层压材料附着到第一层压材料的第一表面上，第二层压材料板具有形成在其中的凹部，通孔或两者中的至少一个，用于容纳第二层压体中的被动部件 。
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公开(公告)号：US20070085200A1
公开(公告)日：2007-04-19
申请号：US11253039
申请日：2005-10-18
Applicant: Chee Lu , Boon Lok , Sunappan Vasudivan
Inventor： Chee Lu , Boon Lok , Sunappan Vasudivan
IPC: H01L23/34
CPC classification number: H01L23/50 , H01L21/4857 , H01L21/486 , H01L23/49827 , H01L2224/16 , H01L2224/16235 , H01L2924/01078 , H01L2924/01079 , H01L2924/09701 , H01L2924/19106 , H01L2924/3011 , H01L2924/3025 , H05K1/0231 , H05K1/115 , H05K1/167 , H05K2201/10545 , H05K2201/10734
Abstract: A substrate for power decoupling and a method of forming a substrate for power decoupling. The substrate comprises one or more decoupling capacitors; and one or more interconnections to the decoupling capacitors. At least one of the interconnections comprises a lossy material.
Abstract translation: 用于电源去耦的衬底和形成用于电源去耦的衬底的方法。 衬底包括一个或多个去耦电容器; 以及与去耦电容器的一个或多个互连。 互连中的至少一个包括有损耗材料。
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