公开(公告)号：US20080254393A1

公开(公告)日：2008-10-16

申请号：US11892002

申请日：2007-08-17

Applicant: Tzu-Hao Chao ,  Yi-Tsuo Wu

Inventor： Tzu-Hao Chao ,  Yi-Tsuo Wu

IPC: G03C5/00

CPC classification number: H01L33/508 ,  H01L2924/0002 ,  H01L2933/0041 ,  H01L2924/00

Abstract: A phosphor coating process for a light-emitting device is described. A light-emitting diode chip is bonded on a substrate. A light-sensitive layer is formed over the light-emitting diode and the substrate. The light-sensitive layer is patterned by a photolithography process to expose an area of the light-emitting diode chip, on which desires a phosphor coating. A phosphor-adhesive material is filled on the area of the light-emitting diode chip.

Abstract translation: 描述了用于发光器件的荧光体涂覆方法。 发光二极管芯片接合在基板上。 在发光二极管和基板上形成感光层。 通过光刻工艺来对感光层进行图案化，以暴露需要荧光体涂层的发光二极管芯片的区域。 在发光二极管芯片的区域上填充有磷光体粘合剂材料。

公开(公告)号：US08258535B2

公开(公告)日：2012-09-04

申请号：US13430663

申请日：2012-03-26

Applicant: Tzu-Hao Chao

Inventor： Tzu-Hao Chao

IPC: H01L33/00

CPC classification number: H01L33/508 ,  H01L33/44 ,  H01L2933/0041

Abstract: In one aspect, a light emitting unit comprises: a first semiconductor layer having a first electric property; a second semiconductor layer having a second electric property disposed over the first semiconductor layer; an active layer disposed between the first semiconductor layer and the second semiconductor layer; a first electrode disposed on the second semiconductor layer; a second electrode disposed under the first semiconductor layer; and a phosphor layer disposed on the first semiconductor layer. The phosphor layer covers the active layer and the second semiconductor layer. The first electrode is exposed out of the phosphor layer.

Abstract translation: 一方面，发光单元包括：具有第一电性质的第一半导体层; 具有设置在所述第一半导体层上的第二电特性的第二半导体层; 设置在所述第一半导体层和所述第二半导体层之间的有源层; 设置在所述第二半导体层上的第一电极; 设置在所述第一半导体层下方的第二电极; 以及设置在第一半导体层上的荧光体层。 磷光体层覆盖有源层和第二半导体层。 第一电极从荧光体层露出。

公开(公告)号：US20110114982A1

公开(公告)日：2011-05-19

申请号：US13013960

申请日：2011-01-26

Applicant: Tzu-Hao Chao

Inventor： Tzu-Hao Chao

IPC: H01L33/44

CPC classification number: H01L33/508 ,  H01L33/44 ,  H01L2933/0041

Abstract: A phosphor coating method for fabricating a light-emitting semiconductor is provided. The phosphor coating method comprises the steps as follows: First a light emitting semiconductor wafer having a plurality of die units formed thereon is provided, and a photoresist is then formed on the light emitting semiconductor wafer to cover the die units. A pattern process is conducted to form a plurality of openings associated with the die units, whereby each die can be exposed via one of the openings. Subsequently, a compound mixed with phosphor is filled into the openings.

Abstract translation: 提供了一种用于制造发光半导体的荧光体涂覆方法。 荧光体涂布方法包括以下步骤：首先，在其上形成有多个模具单元的发光半导体晶片，然后在发光半导体晶片上形成光致抗蚀剂以覆盖模具单元。 进行图案处理以形成与模具单元相关联的多个开口，由此每个模具可以经由其中一个开口露出。 随后，将与磷光体混合的化合物填充到开口中。

公开(公告)号：US07816694B2

公开(公告)日：2010-10-19

申请号：US12057382

申请日：2008-03-28

Applicant: Tzu-Hao Chao ,  Chun-Peng Chen

Inventor： Tzu-Hao Chao ,  Chun-Peng Chen

IPC: H01L33/00

CPC classification number: H01L25/0753 ,  F21K9/00 ,  H01L33/642 ,  H01L2224/48091 ,  H01L2924/01322 ,  H01L2924/00 ,  H01L2924/00014

Abstract: A light emitting semiconductor device is provided, wherein the light emitting semiconductor device comprises a substrate, a plurality of flip chips, a heat conductive board and an insulating board. These flip chips are electrically connected on the substrate. The heat conductive board has a protruding portion used to support the substrate. The insulating board has a plurality of connecting pads and an opening, wherein the protruding portion is sheathed in the opening, so as to expose the substrate. The exposed substrate is then electrically connected to the connecting pads.

Abstract translation: 提供一种发光半导体器件，其中发光半导体器件包括衬底，多个倒装芯片，导热板和绝缘板。 这些倒装芯片电连接在基板上。 导热板具有用于支撑基板的突出部分。 绝缘板具有多个连接焊盘和开口，其中突出部分被套在开口中，以露出基板。 暴露的基板然后电连接到连接焊盘。

公开(公告)号：US20090045417A1

公开(公告)日：2009-02-19

申请号：US12057382

申请日：2008-03-28

Applicant: Tzu-Hao Chao ,  Chun-Peng Chen

Inventor： Tzu-Hao Chao ,  Chun-Peng Chen

IPC: H01L33/00

CPC classification number: H01L25/0753 ,  F21K9/00 ,  H01L33/642 ,  H01L2224/48091 ,  H01L2924/01322 ,  H01L2924/00 ,  H01L2924/00014

Abstract: A light emitting semiconductor device is provided, wherein the light emitting semiconductor device comprises a substrate, a plurality of flip chips, a heat conductive board and an insulating board. These flip chips are electrically connected on the substrate. The heat conductive board has a protruding portion used to support the substrate. The insulating board has a plurality of connecting pads and an opening, wherein the protruding portion is sheathed in the opening, so as to expose the substrate. The exposed substrate is then electrically connected to the connecting pads.

Abstract translation: 提供一种发光半导体器件，其中发光半导体器件包括衬底，多个倒装芯片，导热板和绝缘板。 这些倒装芯片电连接在基板上。 导热板具有用于支撑基板的突出部分。 绝缘板具有多个连接焊盘和开口，其中突出部分被套在开口中，以露出基板。 暴露的基板然后电连接到连接焊盘。

公开(公告)号：US07919229B2

公开(公告)日：2011-04-05

申请号：US11892002

申请日：2007-08-17

Applicant: Tzu-Hao Chao ,  Yi-Tsuo Wu

Inventor： Tzu-Hao Chao ,  Yi-Tsuo Wu

IPC: H01L33/00

CPC classification number: H01L33/508 ,  H01L2924/0002 ,  H01L2933/0041 ,  H01L2924/00

Abstract: A phosphor coating process for a light-emitting device is described. A light-emitting diode chip is bonded on a substrate. A light-sensitive layer is formed over the light-emitting diode and the substrate. The light-sensitive layer is patterned by a photolithography process to expose an area of the light-emitting diode chip, on which desires a phosphor coating. A phosphor-adhesive material is filled on the area of the light-emitting diode chip.

Abstract translation: 描述了用于发光器件的荧光体涂覆方法。 发光二极管芯片接合在基板上。 在发光二极管和基板上形成感光层。 通过光刻工艺来对感光层进行图案化，以暴露需要荧光体涂层的发光二极管芯片的区域。 在发光二极管芯片的区域上填充有磷光体粘合剂材料。

公开(公告)号：US07910387B2

公开(公告)日：2011-03-22

申请号：US11984775

申请日：2007-11-21

Applicant: Tzu-Hao Chao

Inventor： Tzu-Hao Chao

IPC: H01L21/00 ,  H01L33/00

CPC classification number: H01L33/508 ,  H01L33/44 ,  H01L2933/0041

Abstract: A phosphor coating method for fabricating a light-emitting semiconductor is provided. The phosphor coating method comprises the steps as follows: First a light emitting semiconductor wafer having a plurality of die units formed thereon is provided, and a photoresist is then formed on the light emitting semiconductor wafer to cover the die units. A pattern process is conducted to form a plurality of openings associated with the die units, whereby each die can be exposed via one of the openings. Subsequently, a compound mixed with phosphor is filled into the openings.

Abstract translation: 提供了一种用于制造发光半导体的荧光体涂覆方法。 荧光体涂布方法包括以下步骤：首先，在其上形成有多个模具单元的发光半导体晶片，然后在发光半导体晶片上形成光致抗蚀剂以覆盖模具单元。 进行图案处理以形成与模具单元相关联的多个开口，由此每个模具可以经由其中一个开口露出。 随后，将与磷光体混合的化合物填充到开口中。

公开(公告)号：US20100123144A1

公开(公告)日：2010-05-20

申请号：US12621529

申请日：2009-11-19

Applicant: Tzu-Hao Chao

Inventor： Tzu-Hao Chao

IPC: H01L33/00 ,  H01L23/52

CPC classification number: H05K1/181 ,  H01L23/49838 ,  H01L2924/0002 ,  H05K3/403 ,  H05K2201/09181 ,  H05K2201/09254 ,  H05K2201/09409 ,  H05K2201/10106 ,  Y02P70/611 ,  H01L2924/00

Abstract: A circuit structure of a package carrier including a plurality of chip pads, a first electrode, a second electrode, a third electrode and a fourth electrode is provided. These chip pads are arranged in an M×N array. A first bonding pad, a second bonding pad, a third bonding pad and a fourth bonding pad are disposed clockwise in the peripheral area of each chip pad in sequence. The orientations of each of the first, second, third, and fourth bonding pads of the (S−1)th row rotated by 90 degrees are equal to the orientations of each of the first, second, third and fourth bonding pads of the Sth row, respectively. The first electrode is connected with each first bonding pad. The second electrode is connected with each second bonding pad. The third electrode is connected with each third bonding pad. The forth electrode is connected with each forth bonding pad.

Abstract translation: 提供了包括多个芯片焊盘，第一电极，第二电极，第三电极和第四电极的封装载体的电路结构。 这些芯片焊盘以M×N阵列排列。 第一接合焊盘，第二接合焊盘，第三接合焊盘和第四接合焊盘顺序地设置在每个芯片焊盘的外围区域中。 第（S-1）行的第一，第二，第三，第四和第四接合焊盘的旋转90度的取向与Sth的第一，第二，第三和第四接合焊盘的取向相等 行。 第一电极与每个第一接合焊盘连接。 第二电极与每个第二接合焊盘连接。 第三电极与每个第三接合焊盘连接。 第四电极与每个第四接合焊盘连接。

公开(公告)号：US20090057701A1

公开(公告)日：2009-03-05

申请号：US11984775

申请日：2007-11-21

Applicant: Tzu-Hao Chao

Inventor： Tzu-Hao Chao

IPC: H01L33/00

CPC classification number: H01L33/508 ,  H01L33/44 ,  H01L2933/0041

Abstract: A phosphor coating method for fabricating a light-emitting semiconductor is provided. The phosphor coating method comprises the steps as follows: First a light emitting semiconductor wafer having a plurality of die units formed thereon is provided, and a photoresist is then formed on the light emitting semiconductor wafer to cover the die units. A pattern process is conducted to form a plurality of openings associated with the die units, whereby each die can be exposed via one of the openings. Subsequently, a compound mixed with phosphor is filled into the openings.

Abstract translation: 提供了一种用于制造发光半导体的荧光体涂覆方法。 荧光体涂布方法包括以下步骤：首先，在其上形成有多个模具单元的发光半导体晶片，然后在发光半导体晶片上形成光致抗蚀剂以覆盖模具单元。 进行图案处理以形成与模具单元相关联的多个开口，由此每个模具可以经由其中一个开口露出。 随后，将与磷光体混合的化合物填充到开口中。

公开(公告)号：US08624273B2

公开(公告)日：2014-01-07

申请号：US13118575

申请日：2011-05-31

Applicant: Tzu-Hao Chao

Inventor： Tzu-Hao Chao

IPC: H01L29/205

CPC classification number: H05K1/181 ,  H01L23/49838 ,  H01L2924/0002 ,  H05K3/403 ,  H05K2201/09181 ,  H05K2201/09254 ,  H05K2201/09409 ,  H05K2201/10106 ,  Y02P70/611 ,  H01L2924/00

Abstract: A multi-chip package comprises a plurality of chip pads and a plurality of LED chips. The chip pads are arranged in an M×N array, M and N each a positive integer greater than 1. A peripheral area of each chip pad comprises a respective first bonding pad, a respective second bonding pad, and a respective third bonding pad arranged in sequence in a clockwise direction. A first orientation of the respective first to third bonding pads in a first row of the N rows differs from a second orientation of the respective first to third bonding pads in a second row of the N rows by 90 degrees. Each of the LED chips is disposed on a respective one of the chip pads and electrically connected to two of the respective first to third bonding pads on a same side of the respective LED chip.

Abstract translation: 多芯片封装包括多个芯片焊盘和多个LED芯片。 芯片焊盘布置成M×N阵列，M和N各自为大于1的正整数。每个芯片焊盘的外围区域包括相应的第一焊盘，相应的第二焊盘和相应的第三焊盘， 顺时针方向。 N行的第一行中的相应的第一至第三接合焊盘的第一取向与N行的第二行中的相应的第一至第三接合焊盘的第二取向不同，90度。 每个LED芯片设置在相应的一个芯片焊盘上，并且在相应的LED芯片的同一侧上电连接到相应的第一至第三焊盘中的两个。