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公开(公告)号：US20240204566A1
公开(公告)日：2024-06-20
申请号：US17801149
申请日：2022-07-21
Applicant: Renesas Electronics America Inc.
Inventor： Sheng Yuan , Jiangjian Huang , Shangfeng Jiang , Weiwei Zhou
CPC classification number: H02J50/10 , H01F27/2804 , H01F41/041 , H01F2027/2809
Abstract: Apparatuses including a coil and methods of forming the coil are described. The coil can include a first coil layer including at least an inner strand and an outer strand. The coil can further include a second coil layer including at least an inner strand and an outer strand. The inner strand of the first coil layer can be connected to the outer strand of the second coil layer. The outer strand of the first coil layer can be connected to the inner strand of the second coil layer.
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公开(公告)号：US11985014B2
公开(公告)日：2024-05-14
申请号：US17831959
申请日：2022-06-03
Applicant: Renesas Electronics America Inc.
Inventor： Damla Solmaz Acar , Pooja Agrawal , Jure Menart , Tao Qi , Mihail Jefremow , Gustavo James Mehas
Abstract: In an embodiment, a semiconductor device is disclosed that includes at least one processing device and firmware including a dynamic demodulation engine. The dynamic demodulation engine, when executed by the at least one processing device, is configured to obtain a digital signal waveform, dynamically select a bit detection method based at least in part on a characteristic of the digital signal waveform, perform demodulation of the digital signal waveform using the selected bit detection method and generate decoded packets based at least in part on the demodulation.
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公开(公告)号：US11972675B2
公开(公告)日：2024-04-30
申请号：US17745990
申请日：2022-05-17
Applicant: Renesas Electronics America Inc.
Abstract: In an embodiment, a semiconductor device is disclosed. The semiconductor device includes a plurality of output pins. Each of the output pins is electrically connected to an input pin of a buzzer and to a buzzer driver. The buzzer driver is configured to cause the buzzer to emit an audible sound. The semiconductor device further includes a plurality of ground switches. Each ground switch is configured to connect a corresponding output pin of the plurality of output pins to ground when closed. The semiconductor device further includes a current generator that is configured to supply a test current to a given output pin of the plurality of output pins and a clamp switch that is configured to connect the given output pin to an analog-to-digital converter.
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公开(公告)号：US20240120924A1
公开(公告)日：2024-04-11
申请号：US17961741
申请日：2022-10-07
Applicant: RENESAS ELECTRONICS AMERICA INC.
Inventor： Menno Tjeerd Spijker
CPC classification number: H03L7/07 , H03L7/1075 , H03L7/23 , H04L7/0337
Abstract: Semiconductor devices for synchronizing networks are described. A semiconductor device can include an analog phase-lock loop (APLL) configured to output a first signal. The semiconductor device can further include a first digital phase-lock loop (DPLL) configured to output a second signal. The semiconductor device can further include a second DPLL configured to output a third signal. A combination of the first signal and the second signal can be used to generate a first output clock signal. A difference resulting from a subtraction of the second signal from the third signal can be used to generate a second output clock signal.
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公开(公告)号：US11831405B2
公开(公告)日：2023-11-28
申请号：US17692762
申请日：2022-03-11
Applicant: Renesas Electronics America Inc.
Inventor： Oleksandr Korovin , Alexandru Mihut , Greg Anton Armstrong , Leonid Goldin
CPC classification number: H04J3/0667 , H04J3/025 , H04J3/0617
Abstract: Systems and methods for reducing phase delay variation impact are described. A microcontroller can receive a sequence of phase offsets determined by a slave device over time. The microcontroller can determine a weight vector based on a metric associated with the sequence of phase offsets. The microcontroller can adjust a set of filter coefficients based on the weight vector. The set of filter coefficients can be filter coefficients of a filter being implemented by the slave device to filter incoming packet data.
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Patent Agency Ranking
公开(公告)号：US20230318361A1
公开(公告)日：2023-10-05
申请号：US18331583
申请日：2023-06-08
Applicant: Renesas Electronics America Inc.
Inventor： Jiangjian HUANG , Hulong ZENG
CPC classification number: H02J50/12 , H04B5/0081 , H04B5/0037 , H02M7/521
Abstract: Apparatuses including multiple selectable circuit elements are described. In an example, an apparatus may include a power supply configured to output a voltage. The apparatus may further include a controller connected to the power supply and a transmission unit connected to the controller. The transmission unit may be configured to output power. The transmission unit may include comprising an inverter connected to the power supply. The inverter may include a high-side switching element. The transmission unit may further include a circuit element a circuit connected to the power supply. The circuit may be configured to select the circuit element. The circuit may include a switch connected between the inverter and the circuit element. The switch and the high-side switching element may be configured to be driven by the voltage outputted by power supply. The controller may be configured to control the power being outputted by the transmission unit.
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公开(公告)号：US11747379B2
公开(公告)日：2023-09-05
申请号：US17592934
申请日：2022-02-04
Applicant: Renesas Electronics America Inc.
Inventor： David Mitchell Grice
CPC classification number: G01R27/2629 , G01R35/005
Abstract: In an embodiment, an apparatus is disclosed that comprises a plurality of resistors arranged as a reverse bridge and configured to convert an input voltage to a scaled output voltage. The scaled output voltage is scaled to a target format based at least in part on a range of the input voltage and a fixed value of the plurality of resistors. The input voltage is generated based at least in part on at least one signal generated by a sensor based at least in part on a measurement of a property of a measurement target. At least one of the plurality of resistors has a resistance value of R and at least another of the plurality of resistors has a resistance value of R plus or minus ΔR.
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98.发明公开公开(公告)号：US20230275619A1
公开(公告)日：2023-08-31
申请号：US17680794
申请日：2022-02-25
Applicant: Renesas Electronics America Inc.
Inventor： Gustavo James MEHAS , Giovanni FIGLIOZZI
CPC classification number: H04B5/0037 , H04B5/0087 , H02J50/12 , H02J50/40 , H02J50/60
Abstract: In an embodiment, a semiconductor device is disclosed that comprises a multiplexer. The multiplexer is configured to receive signals from each of a plurality of transmission coils of a wireless power transmitter as inputs and to output an output signal based at least in part on one of the signals. The semiconductor device further comprises an attenuator connected to the multiplexer that is configured to adjust a voltage of the output signal. The attenuator comprises a variable resistance. The semiconductor device further comprises a plurality of pull down circuits each corresponding to one of the transmission coils. The pull down circuits are configured to selectively clamp the signals received from the corresponding transmission coils to ground.
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公开(公告)号：US11709787B2
公开(公告)日：2023-07-25
申请号：US17739749
申请日：2022-05-09
Applicant: Renesas Electronics America Inc.
Inventor： Shubing Zhai , James Wang , Jankin Hu , Wei Wang
CPC classification number: G06F13/1668 , G06F13/4282 , G06F2213/0016
Abstract: Apparatuses for controlling data transaction between master and slave devices are described. A master port connected to a master device can include a voltage regulator, a bridging circuit connected to a network element, and a redriver circuit. In response to a data transaction corresponding to a first type of data transaction, the master port can activate the voltage regulator and deactivate the redriver circuit to support a first operation mode causing the master device to perform the data transaction with a slave device via the network element. In response to the data transaction corresponding to a second type of data transaction, the master port can deactivate the voltage regulator and activate the redriver circuit to support a second operation mode causing the master port to disconnect from a slave port connected to the slave device and the data transaction is fulfilled by a circuit connected to the slave device.
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100.发明公开公开(公告)号：US20230221149A1
公开(公告)日：2023-07-13
申请号：US18075718
申请日：2022-12-06
Applicant: Renesas Electronics America Inc.
Inventor： Josef Janisch , Rudolf Pichler , Juergen Kernhof , Svilen Kastev
IPC: G01D5/20
CPC classification number: G01D5/2066
Abstract: An inductive position sensor and method for detecting a movement of a conductive target, having: at least a first and a second transmitter coil having the same shape and which are phase-shifted to each other, at least one oscillator for generating a first and a second transmitter signal having the same shape and which are phase shifted to each other and are applied to the first transmitter coil and second transmitter coil respectively, at least one receiver coil, and a processing unit for determining a phase-shift between the first or second transmitter signal and a receiver signal received at the receiver coil; the determined phase-shift corresponding to the position of the conductive target above the first and second transmitter coils.
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